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One aspect of system security is evaluating a system’s vulnerability to Trojan attack. A hardware Trojan attack can have potentially devastating effects, especially given the increased reliance on integrated circuits within critical systems. A significant amount of research concerns attacks on digital systems, but attacks on AMS and RF systems have recently been of interest as well. A class of Trojans has been proposed that uses undesired alternate modes of operation in nonlinear systems as the Trojan payload. These Trojans are of particular interest because they do not cause deviations from the ideal system performance and cannot be detected until the Trojan is triggered. This work addresses this class of Trojans by listing different payloads, trigger mechanisms, and examples of system architectures vulnerable to attack.more » « less
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A subthreshold hybrid PUF-embedded authentication circuit is proposed to mitigate the financial incentives that drive the counterfeit community and to encourage the COTS manufacturers to use authentication for system identification in their parts. The proposed hybrid PUF with cross-coupled inverters and a delay-based PUF strategy has sufficient entropy for authentication and a reduced number of transistors per bit. The area efficient fingerprint circuit does not require additional die area, pins, or power overhead. The performance of the primary circuit is unaffected by the fingerprint circuit. The hybrid circuit designed in a 65 nm CMOS process is discussed.more » « less
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Hardware security vulnerabilities to hardware Trojans in widely used filter structures are identified. The widely used two-integrator loop filter architecture known as the Kerwin-Huelsman-Newcomb (KHN) Biquad is used to demonstrate the vulnerability. It is shown that the relationship between the passive component values and the nonlinear amplifier parameters, the slew rate and the output saturation voltages, determine the presence or absence of a stationary nonlinear undesired oscillatory mode of operation. Experimental results obtained from a discrete component filter demonstrate the vulnerability to the Trojan mode of operation in this filter structure.more » « less
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An anticounterfeit strategy based upon PUFembedded authentication circuits is proposed that will eliminate financial incentives for counterfeiters and reduce the insertion barrier for COTS manufactures. In many applications, the authentication circuit will not require additional die area, pins, or a power overhead and will not adversely affect the performance of the original circuitry. The performance of an implementation of the authentication circuit which has a large number of challenge/response pairs has been designed in a UMC 65 nm process will be discussed.more » « less
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A simple PUF-based authentication circuit is proposed that will lower the entry barrier for counterfeit countermeasures by COTs manufacturers of integrated circuits. The on-chip fingerprint circuit does not require additional die area, I/O pins, or a separate read-out circuit. This approach to assuring integrity in the semiconductor supply chain will result in negative financial incentives for counterfeiters. An 80 bit authentication circuit which includes a 16 bit frame header has been designed in a UMC 65nm process with an area estimate of 0.01 mm2.more » « less
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A simple PUF-based authentication circuit is proposed that will lower the entry barrier for counterfeit countermeasures by COTs manufacturers of integrated circuits. The on-chip fingerprint circuit does not require additional die area, I/O pins, or a separate read-out circuit. This approach to assuring integrity in the semiconductor supply chain will result in negative financial incentives for counterfeiters. An 80 bit authentication circuit which includes a 16 bit frame header has been designed in a UMC 65nm process with an area estimate of 0.01 mm2.more » « less
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A simple and compact authentication circuit based on a 4T bit cell is proposed for counterfeit detection and avoidance. The PUF-based authentication circuit has been designed to reduce or eliminate the reluctance of COTs manufacturers to include onchip fingerprints by not requiring additional die area, I/O pins, or read-out circuits and by using a deep-sleep mode during normal circuit operation so that it does not interfere with operation of the main IC.more » « less
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