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1. Auger effect limited performance in tunnel field effect transistors

   https://doi.org/10.1109/E3S.2017.8246156  

   Ahmed, Sheikh; Tan, Yaohua; Truesdell, Daniel; Ghosh, Avik (October 2017, 2017 Fifth Berkeley Symposium on Energy Efficient Electronic Systems & Steep Transistors Workshop (E3S))

   null (Ed.)

   Tunnel field-effect-transistors (TFETs) are promising candidates for next generation transistors for low power applications, as the TFETs promise low subthreshold swing (SS). Different from traditional MOSFET, the TFETs rely on energy-efficient switching of band-to-band tunneling (BTBT), therefore the SS in TFETs is not limited by the 60 mV/decade Boltzmann limit. This reduction in energy consumption makes TFETs suitable candidates to replace standard MOSFETs in low power applications. However, most experimentally demonstrated TFETs suffer from low on current[1], and the theoretical low SS is compromised by impurities and Auger generation. To understand the underlying physics and predict the device characteristics of TFETs, sophisticated numerical simulations can be used. On the other hand, physics based compact models are also required to provide fast predictions for existing and new device concepts. Furthermore, a physics based compact model is more efficient to model the effects like Auger generation which could be time-consuming for numerical calculations. In this work, we introduce a physics based compact model for homojunction TFETs with Auger generation effect considered. This compact model is based on the modified Simmons' equation at finite temperature[2]. With our compact model, the possible impact of Auger generation effect to off-current and SS is explored. 

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2. InP MOSFETs Exhibiting Record 70 mV/dec Subthreshold Swing

   Tseng, Hsin-Ying; Fang, Yihao; Zhong, Shibo; Rodwell, Mark (June 2019, 2019 IEEE Device Research Conference)

   Low InP/dielectric interface trap density Dit will enable low subthreshold swings (SS) in mm-wave MOSFETs [1] using InGaAs/InP composite channels [2] for increased breakdown and in tunnel FETs (TFETs) [3] using InAs/InP heterojunctions [4] for increased tunneling probability. Reducing Dit at the etched InP mesa edges of DHBTs and avalanche photodiodes will reduce leakage currents and increase breakdown voltages. While it can be difficult [5] to extract Dit of III-V interfaces from MOSCAP characteristics, Dit can be readily determined from the SS of long gate length Lg MOSFETs. Here we report InP-channel MOSFETs with record low SS indicating record low Dit at the semiconductor-dielectric interface. The devices use a AlOxNy/ZrO2 gate dielectric and a 14nm channel thickness Tch. A sample of 13 MOSFETs at 2 m Lg shows SS=70mV/dec. (mean) ±3 mV/dec. (standard deviation), corresponding to a minimum Dit ~3×1012 cm-2eV-1. The lowest SS observed at 2 m Lg is 66 mV/dec. The results suggest that wide-bandgap InP layers can be incorporated into MOS device designs without large degradations in DC characteristics arising from interface defects 

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3. (Digital Presentation) Calculation of the Energy Band Diagram and Estimation of Electronic Transport Parameters of Metastable Amorphous Ge ₂ Sb ₂ Te ₅

   https://doi.org/10.1149/10801.0029ecst  

   Kashem, Md Tashfiq; Muneer, Sadid; Adnane, Lhacene; Dirisaglik, Faruk; Gokirmak, Ali; Silva, Helena (May 2022, ECS Transactions)

   We calculate critical electronic conduction parameters of the amorphous phase of Ge 2 Sb 2 Te 5 (GST), a common material used in phase change memory. We estimate the room temperature bandgap of metastable amorphous GST to be E g (300K) = 1.84 eV based on a temperature dependent energy band model. We estimate the free carrier concentration at the melting temperature utilizing the latent heat of fusion to be 1.47 x 10 22 cm -3 . Using the thin film melt resistivity, we calculate the carrier mobility at melting point as 0.187 cm 2 /V-s. Assuming that metastable amorphous GST is a supercooled liquid with bipolar conduction, we compute the total carrier concentration as a function of temperature and estimate the room temperature free carrier concentration as p(300K) ≈ n(300K) = 1.69×10 17 cm -3 . Free electrons and holes are expected to recombine over time and the stable (drifted) amorphous GST is estimated to have p-type conduction with p(300K) ≈ 6×10 16 cm -3 . 

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4. Impact of Stokes Shift on the Performance of Near-Infrared Harvesting Transparent Luminescent Solar Concentrators

   https://doi.org/10.1038/s41598-018-34442-3  

   Yang, Chenchen; Zhang, Jun; Peng, Wei-Tao; Sheng, Wei; Liu, Dianyi; Kuttipillai, Padmanaban S.; Young, Margaret; Donahue, Matthew R.; Levine, Benjamin G.; Borhan, Babak; et al (November 2018, Scientific Reports)

   Abstract Visibly transparent luminescent solar concentrators (TLSC) have the potential to turn existing infrastructures into net-zero-energy buildings. However, the reabsorption loss currently limits the device performance and scalability. This loss is typically defined by the Stokes shift between the absorption and emission spectra of luminophores. In this work, the Stokes shifts (SS) of near-infrared selective-harvesting cyanines are altered by substitution of the central methine carbon with dialkylamines. We demonstrate varyingSSwith values over 80 nm and ideal infrared-visible absorption cutoffs. The corresponding TLSC with such modification shows a power conversion efficiency (PCE) of 0.4% for a >25 cm²device area with excellent visible transparency >80% and up to 0.6% PCE over smaller areas. However, experiments and simulations show that it is not the Stokes shift that is critical, but the total degree of overlap that depends on the shape of the absorption tails. We show with a series ofSS-modulated cyanine dyes that theSSis not necessarily correlated to improvements in performance or scalability. Accordingly, we define a new parameter, the overlap integral, to sensitively correlate reabsorption losses in any LSC. In deriving this parameter, new approaches to improve the scalability and performance are discussed to fully optimize TLSC designs to enhance commercialization efforts. 

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5. High performance AlGaN/GaN MISHEMTs using N ₂ O treated TiO ₂ as the gate dielectric

   https://doi.org/10.1088/1361-6641/ad96dc  

   Zhama, Tuofu; Cui, Peng; Chen, Zijun; Zhang, Jie; Zhao, Haochen; Wei, Lincheng; Sharma, Ashwani; Bakaul, Saidur; Zeng, Yuping (December 2024, Semiconductor Science and Technology)

   Abstract In this work, TiO₂thin films deposited by the atomic layer deposition (ALD) method were treated with a special N₂O plasma surface treatment and used as the gate dielectric for AlGaN/GaN metal insulator semiconductor high electron mobility transistors (MISHEMTs). The N₂O plasma surface treatment effectively reduces defects in the oxide during low-temperature ALD growth. In addition, it allows oxygen atoms to diffuse into the device cap layer to increase the barrier height and thus reduce the gate leakage current. These TiO₂films exhibit a dielectric constant of 54.8 and a two-terminal current of 1.96 × 10⁻¹⁰A mm⁻¹in 2μm distance. When applied as the gate dielectric, the AlGaN/GaN MISHEMT with a 2μm-gate-length shows a high on/off ratio of 2.59 × 10⁸and a low subthreshold slope (SS) of 84 mV dec⁻¹among all GaN MISHEMTs using TiO₂as the gate dielectric. This work provides a feasible way to significantly improve the TiO₂film electrical property for gate dielectrics, and it suggests that the developed TiO₂dielectric is a promising high-κgate oxide and a potential passivation layer for GaN-based MISHEMTs, which can be further extended to other transistors. 

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