Karandikar, Sagar, Leary, Chris, Kennelly, Chris, Zhao, Jerry, Parimi, Dinesh, Nikolic, Borivoje, Asanovic, Krste, and Ranganathan, Parthasarathy. A Hardware Accelerator for Protocol Buffers. Retrieved from https://par.nsf.gov/biblio/10347874. 54th Annual IEEE/ACM International Symposium on Microarchitecture . Web. doi:10.1145/3466752.3480051.

Karandikar, Sagar, Leary, Chris, Kennelly, Chris, Zhao, Jerry, Parimi, Dinesh, Nikolic, Borivoje, Asanovic, Krste, & Ranganathan, Parthasarathy. A Hardware Accelerator for Protocol Buffers. 54th Annual IEEE/ACM International Symposium on Microarchitecture, (). Retrieved from https://par.nsf.gov/biblio/10347874. https://doi.org/10.1145/3466752.3480051

Karandikar, Sagar, Leary, Chris, Kennelly, Chris, Zhao, Jerry, Parimi, Dinesh, Nikolic, Borivoje, Asanovic, Krste, and Ranganathan, Parthasarathy. "A Hardware Accelerator for Protocol Buffers". 54th Annual IEEE/ACM International Symposium on Microarchitecture (). Country unknown/Code not available. https://doi.org/10.1145/3466752.3480051. https://par.nsf.gov/biblio/10347874.

@article{osti_10347874,
place = {Country unknown/Code not available}, title = {A Hardware Accelerator for Protocol Buffers}, url = {https://par.nsf.gov/biblio/10347874}, DOI = {10.1145/3466752.3480051}, abstractNote = {}, journal = {54th Annual IEEE/ACM International Symposium on Microarchitecture}, author = {Karandikar, Sagar and Leary, Chris and Kennelly, Chris and Zhao, Jerry and Parimi, Dinesh and Nikolic, Borivoje and Asanovic, Krste and Ranganathan, Parthasarathy}, }