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1. Learning the sparsity for ReRAM: mapping and pruning sparse neural network for ReRAM based accelerator

   https://doi.org/10.1145/3287624.3287715  

   Lin, Jilan ; Zhu, Zhenhua ; Wang, Yu ; Xie, Yuan ( January 2019 , the 24th Asia and South Pacific Design Automation Conference)
2. Investigation of ReRAM Variability on Flow-Based Edge Detection Computing Using HfO ₂ -Based ReRAM Arrays

   https://doi.org/10.1109/TCSI.2021.3072210  

   Rafiq, Sarah ; Hazra, Jubin ; Liehr, Maximilian ; Beckmann, Karsten ; Abedin, Minhaz ; Pannu, Jodh S. ; Jha, Sumit K. ; Cady, Nathaniel C. ( July 2021 , IEEE Transactions on Circuits and Systems I: Regular Papers)
3. Improving DNN Fault Tolerance using Weight Pruning and Differential Crossbar Mapping for ReRAM-based Edge AI

   https://doi.org/10.1109/ISQED51717.2021.9424332  

   Yuan, Geng ; Liao, Zhiheng ; Ma, Xiaolong ; Cai, Yuxuan ; Kong, Zhenglun ; Shen, Xuan ; Fu, Jingyan ; Li, Zhengang ; Zhang, Chengming ; Peng, Hongwu ; et al ( April 2021 , 22nd International Symposium on Quality Electronic Design (ISQED))
4. MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators

   https://doi.org/10.1145/3477009  

   Qiu, Keni ; Jao, Nicholas ; Zhou, Kunyu ; Liu, Yongpan ; Sampson, Jack ; Kandemir, Mahmut Taylan ; Narayanan, Vijaykrishnan ( October 2021 , ACM Transactions on Embedded Computing Systems)

   There is an ongoing trend to increasingly offload inference tasks, such as CNNs, to edge devices in many IoT scenarios. As energy harvesting is an attractive IoT power source, recent ReRAM-based CNN accelerators have been designed for operation on harvested energy. When addressing the instability problems of harvested energy, prior optimization techniques often assume that the load is fixed, overlooking the close interactions among input power, computational load, and circuit efficiency, or adapt the dynamic load to match the just-in-time incoming power under a simple harvesting architecture with no intermediate energy storage. Targeting a more efficient harvesting architecture equipped with both energy storage and energy delivery modules, this paper is the first effort to target whole system, end-to-end efficiency for an energy harvesting ReRAM-based accelerator. First, we model the relationships among ReRAM load power, DC-DC converter efficiency, and power failure overhead. Then, a maximum computation progress tracking scheme ( MaxTracker ) is proposed to achieve a joint optimization of the whole system by tuning the load power of the ReRAM-based accelerator. Specifically, MaxTracker accommodates both continuous and intermittent computing schemes and provides dynamic ReRAM load according to harvesting scenarios. We evaluate MaxTracker over four input power scenarios, and the experimentalmore »results show average speedups of 38.4%/40.3% (up to 51.3%/84.4%), over a full activation scheme (with energy storage) and order-of-magnitude speedups over the recently proposed (energy storage-less) ResiRCA technique. Furthermore, we also explore MaxTracker in combination with the Capybara reconfigurable capacitor approach to offer more flexible tuners and thus further boost the system performance.« less
5. LSTMs for Keyword Spotting with ReRAM-based Compute-In-Memory Architectures

   https://doi.org/10.1109/ISCAS51556.2021.9401295  

   Schaefer, Clemens JS ; Horeni, Mark ; Taheri, Pooria ; Joshi, Siddharth ( May 2021 , 2021 IEEE International Symposium on Circuits and Systems)

   The increasingly central role of speech based human computer interaction necessitates on-device, low-latency, low-power, high-accuracy key word spotting (KWS). State-of-the-art accuracies on speech-related tasks have been achieved by long short-term memory (LSTM) neural network (NN) models. Such models are typically computationally intensive because of their heavy use of Matrix vector multiplication (MVM) operations. Compute-in-Memory (CIM) architectures, while well suited to MVM operations, have not seen widespread adoption for LSTMs. In this paper we adapt resistive random access memory based CIM architectures for KWS using LSTMs. We find that a hybrid system composed of CIM cores and digital cores achieves 90% test accuracy on the google speech data set at the cost of 25 uJ/decision. Our optimized architecture uses 5-bit inputs, and analog weights to produce 6-bit outputs. All digital computation are performed with 8-bit precision leading to a 3.7× improvement in computational efficiency compared to equivalent digital systems at that accuracy.