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1. Commissioning and performance of the Trinity Demonstrator

   https://doi.org/10.1016/j.nima.2025.170769  

   Bagheri, Mahdi; Barletta, Adam; Bogdan, Jordan; Brown, Anthony M; Cedeno, Luigi; Fedkevych, Mariia; Gadamsetty, Srikar; Gazda, Eliza; Holder, Jamie; Judd, Eleanor; et al (November 2025, Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment)

   The Trinity Demonstrator is a proof of concept prototype for the Trinity Neutrino Observatory, which is sensitive to astrophysical neutrinos above PeV energies. The Demonstrator is a one-square meter class imaging atmospheric Cherenkov telescope deployed on Frisco Peak, Utah, and remotely operated. The light-collection surface is equipped with 77 mirror facets with 15 cm diameter, and its field of view is instrumented with a 256-pixel silicon-photomultiplier camera yielding a angular resolution. The camera signals are digitized with a 100 MS/s, and 12-bit resolution switched capacitor array readout. We discuss the Demonstrator’s design, the telescope’s deployment on Frisco Peak, and its commissioning. 

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2. CMOS-BASED DIELECTROPHORESIS-IMPEDANCE SENSOR FOR INTEGRATED LAB-ON-CHIP SYSTEMS

   Elkotn; Karim (October 2025, CSULB)

   Lab-on-Chip (LoC) platforms offer miniaturized diagnostic capabilities, but their reliance on bulky benchtop hardware limits portability and deployment. This thesis presents a CMOS-based dielectrophoresis-impedance (DEP-Impedance) sensor that integrates DEP actuation and impedance measurement into a single compact circuit. The design was implemented in Cadence Virtuoso and validated through parametric sweeps and transient simulations of resistance, capacitance, and clock frequency to characterize charge storage, damping effects, and timing behavior. A fully addressable 8 × 8 array with decoder-based row/column selection was demonstrated, confirming two-dimensional actuation and clean one-hot activation. Results show nanosecond-scale address-to-output latency and stable charge–discharge cycles when properly synchronized. Power analysis identified the custom operational amplifier as the dominant block, consuming approximately 18 𝜇W, while the decoder and array input exhibited sub-microwatt and picowatt-level consumption, respectively. Input impedance measurements confirmed gigaohm-scale resistance and sub-femtofarad capacitance, supporting high sensitivity for biosensing applications. These results validate the feasibility of CMOS DEP–Impedance integration as a scalable and power-efficient alternative to benchtop instrumentation. Future work includes differential readout for noise reduction, bootstrapped switches for improved low-voltage performance, and array scaling beyond 8 × 8 toward fully integrated, point-of-care biosensing platforms. 

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3. A Low-power Reconfigurable Readout Circuit with Large DC Offset Reduction for Neural Signal Recording Applications

   https://doi.org/10.1109/MWSCAS48704.2020.9184526  

   Tasneem, Nishat; Mahbub, Ifana (August 2020, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS))

   null (Ed.)

   This paper presents a fully reconfigurable readout circuit including a chopper-stabilized neural amplifier and a successive approximation register (SAR) analog-to-digital converter (ADC) for neural signal recording applications. Since the target neural signals - action potentials (APs) and local field potentials (LFPs) differ in the peak amplitude while occupying different frequency bandwidths, gain, and bandwidth reconfigurability would be advantageous in improving power and noise performance. The readout circuit is designed in 180 nm standard CMOS technology. It achieves the mid-band gain of 50.3 dB in the frequency band of 0.1 Hz - 250 Hz to detect the LFPs, and 63.4 dB in 267 Hz - 20.8 kHz for detecting the APs. The neural amplifier consumes a total power of 1.54 μW and 1.94 μW for LFP and AP configurations, respectively. The input-referred noises have been achieved as 0.97 μV rms (0.1 Hz - 250 Hz), and 0.44 μV rms (250 Hz - 5 kHz), leading to a noise efficiency factor (NEF) of 1.27 and 1.21, for the two configurations, respectively. It rejects the generated large DC offset up to 40 mV at the electrode-tissue interface, by implementing a DC servo loop (DSL). The offset voltage with the DSL becomes 0.23 mV, which is acceptable for the neural experiments. Enabling the impedance boosting loop, the DC input impedance is found to be within the range of 1.77 - 2.27 GΩ, introducing the reconfigurability in impedance for matching with the electrode impedance. The SAR-ADC having a varying sampling frequency ranging from 10 - 40 ksamples/s demonstrates to digitize the APs and the LFPs with the resolution from 8 - 10 bits. The entire AFE provides good compatibility to record the neural signal while lowering the large DC offset down to 0.23 mV. 

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4. Investigation and Design of a Towable Hydrophone Array for General Ocean Sensing

   https://doi.org/10.1109/OCEANSE.2019.8867239  

   Schinault, Matthew E.; Penna, Seth M.; Garcia, Heriberto A.; Ratilal, Purnima (June 2019, IEEE OCEANS 2019 - Marseille)

   An eight-element oil-filled hydrophone array is used to measure the acoustic field in littoral waters. This prototype array was deployed during an experiment between Jeffrey’s Ledge and the Stellwagen Bank region off the coast of Rockport, Massachusetts USA. During the experiment, several humpback whale vocalizations, distant ship tonals and high frequency conventional echosounder pings were recorded. Visual confirmation of humpback moving in bearing relative to the array verifies the directional sensing from array beamforming. During deployment, the array is towed at speeds varying from 4-7 kts in water depths of roughly 100 m with conditions at sea state 2 to 3. This array system consists of a portable winch with array, tow cable and 3 water-resistant boxes housing electronics. This system is deployed and operated by 2 crew members onboard a 13 m commercial fishing vessel during the experiment. Non-acoustic sensor (NAS) information is obtained to provide depth, temperature, and heading data using commercial off the shelf (COTS) components utilizing RS485/232 data communications. Acoustic data sampling was performed at 8 kHz, 30 kHz and 100 kHz with near real-time processing of data and enhanced Signal to Noise Ratio (SNR) from beamforming. The electrical system components are deployed with 3 stacked electronics boxes housing power, data acquisition and data processing components in water resistant compartments. A laptop computer with 8 TB of external storage and an independent Global Positioning System (GPS) antenna is used to run Passive Ocean Acoustic Waveguide Remote Sensing (POAWRS) software providing beamformed spectrogram data and live NAS data with capability of capturing several days of data. The acquisition system consists of Surface Mount Device (SMD) pre-amplifiers with filter to an analog differential pair shipboard COTS acquisition system. Pre-amplifiers are constructed using SMD technology where components are pressure tolerant and potting is not necessary. Potting of connectors, electronics and hydrophones via 3D printed molding techniques will be discussed. Array internal components are manufactured with Thermoplastic Polyurethane (TPU) 3D printed material to dampen array vibrations with forward and aft vibration isolation modules (VIM). Polyurethane foam (PUF) used to scatter breathing waves and dampen contact from wires inside the array without attenuating high frequencies and allowing for significant noise reduction. A single Tygon array section with a length of 7.5 m and diameter of 38 mm contains 8 transducer elements with a spacing of 75 cm (1 kHz design frequency). Pre- amplifiers and NAS modules are affixed using Vectran and steel wire rope positioned by swaged stops along the strength member. The tow cable length is 100 m with a diameter of 22 mm that is potted to a hose adapter to break out 12 braided copper wire twisted pair conductors and terminates the tow cable Vectran braid. This array in its current state of development is a low-cost alternative to obtain quality acoustic data from a towed array system. Used here for observation of whale vocalizations, this type of array also has many applications in military sonar and seismic surveying. Maintenance on the array can be performed without the use of special facilities or equipment for dehosing and conveniently uses castor oil as an environmentally safe pressure compensating and coupling fluid. Array development including selection of transducers, NAS modules, acoustic acquisition system, array materials and method of construction with results from several deployments will be discussed. We also present beamformed spectrograms containing humpback whale downsweep moans and underwater blowing (bubbles) sounds associated with feeding on sand lance (Ammodytes dubius). 

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5. Towards quantum belief propagation for LDPC decoding in wireless networks

   https://doi.org/10.1145/3372224.3419207  

   Kasi, Srikar; Jamieson, Kyle (September 2020, Proceedings of the 26th Annual International Conference on Mobile Computing and Networking (ACM MobiCom))

   We present Quantum Belief Propagation (QBP), a Quantum Annealing (QA) based decoder design for Low Density Parity Check (LDPC) error control codes, which have found many useful applications in Wi-Fi, satellite communications, mobile cellular systems, and data storage systems. QBP reduces the LDPC decoding to a discrete optimization problem, then embeds that reduced design onto quantum annealing hardware. QBP's embedding design can support LDPC codes of block length up to 420 bits on real state-of-the-art QA hardware with 2,048 qubits. We evaluate performance on real quantum annealer hardware, performing sensitivity analyses on a variety of parameter settings. Our design achieves a bit error rate of 10--8 in 20 μs and a 1,500 byte frame error rate of 10--6 in 50 μs at SNR 9 dB over a Gaussian noise wireless channel. Further experiments measure performance over real-world wireless channels, requiring 30 μs to achieve a 1,500 byte 99.99% frame delivery rate at SNR 15-20 dB. QBP achieves a performance improvement over an FPGA based soft belief propagation LDPC decoder, by reaching a bit error rate of 10--8 and a frame error rate of 10--6 at an SNR 2.5--3.5 dB lower. In terms of limitations, QBP currently cannot realize practical protocol-sized (e.g., Wi-Fi, WiMax) LDPC codes on current QA processors. Our further studies in this work present future cost, throughput, and QA hardware trend considerations. 

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