Pal, Saptadeep, Liu, Jingyang, Alam, Irina, Cebry, Nicholas, Suhail, Haris, Bu, Shi, Iyer, Subramanian S., Pamarti, Sudhakar, Kumar, Rakesh, and Gupta, Puneet. Designing a 2048-Chiplet, 14336-Core Waferscale Processor. Retrieved from https://par.nsf.gov/biblio/10462995. Design Automation Conference . Web. doi:10.1109/DAC18074.2021.9586194.

Pal, Saptadeep, Liu, Jingyang, Alam, Irina, Cebry, Nicholas, Suhail, Haris, Bu, Shi, Iyer, Subramanian S., Pamarti, Sudhakar, Kumar, Rakesh, & Gupta, Puneet. Designing a 2048-Chiplet, 14336-Core Waferscale Processor. Design Automation Conference, (). Retrieved from https://par.nsf.gov/biblio/10462995. https://doi.org/10.1109/DAC18074.2021.9586194

Pal, Saptadeep, Liu, Jingyang, Alam, Irina, Cebry, Nicholas, Suhail, Haris, Bu, Shi, Iyer, Subramanian S., Pamarti, Sudhakar, Kumar, Rakesh, and Gupta, Puneet. "Designing a 2048-Chiplet, 14336-Core Waferscale Processor". Design Automation Conference (). Country unknown/Code not available. https://doi.org/10.1109/DAC18074.2021.9586194. https://par.nsf.gov/biblio/10462995.

@article{osti_10462995,
place = {Country unknown/Code not available}, title = {Designing a 2048-Chiplet, 14336-Core Waferscale Processor}, url = {https://par.nsf.gov/biblio/10462995}, DOI = {10.1109/DAC18074.2021.9586194}, abstractNote = {}, journal = {Design Automation Conference}, author = {Pal, Saptadeep and Liu, Jingyang and Alam, Irina and Cebry, Nicholas and Suhail, Haris and Bu, Shi and Iyer, Subramanian S. and Pamarti, Sudhakar and Kumar, Rakesh and Gupta, Puneet}, }