This article discusses the current state of development, open research opportunities, and application perspectives of electric‐field‐controlled magnetic tunnel junctions that use the voltage‐controlled magnetic anisotropy effect to control their magnetization. The integration of embedded magnetic random‐access memory (MRAM) into mainstream semiconductor foundry manufacturing opens new possibilities for the development of energy‐efficient, high‐performance, and intelligent computing systems. The current generation of MRAM, which uses the current‐controlled spin‐transfer torque (STT) effect to write information, has gained traction due to its nonvolatile data retention and lower integration cost compared to embedded Flash. However, scaling MRAM to high bit densities will likely require a transition from current‐controlled to voltage‐controlled operation. In this perspective, an overview of voltage‐controlled magnetic anisotropy (VCMA) as a promising beyond‐STT write mechanism for MRAM devices is provided and recent advancements in developing VCMA‐MRAM devices with perpendicular magnetization are highlighted. Starting from the fundamental mechanisms, the key remaining challenges of VCMA‐MRAM, such as increasing the VCMA coefficient, controlling the write error rate, and achieving field‐free VCMA switching are discussed. Then potential solutions are discussed and open research questions are highlighted. Lastly, prospective applications of voltage‐controlled magnetic tunnel junctions (VC‐MTJs) in security applications, extending beyond their traditional role as memory devices are explored.
Probabilistic (p-) computing is a physics-based approach to addressing computational problems which are difficult to solve by conventional von Neumann computers. A key requirement for p-computing is the realization of fast, compact, and energy-efficient probabilistic bits. Stochastic magnetic tunnel junctions (MTJs) with low energy barriers, where the relative dwell time in each state is controlled by current, have been proposed as a candidate to implement p-bits. This approach presents challenges due to the need for precise control of a small energy barrier across large numbers of MTJs, and due to the need for an analog control signal. Here we demonstrate an alternative p-bit design based on perpendicular MTJs that uses the voltage-controlled magnetic anisotropy (VCMA) effect to create the random state of a p-bit on demand. The MTJs are stable (i.e. have large energy barriers) in the absence of voltage, and VCMA-induced dynamics are used to generate random numbers in less than 10 ns/bit. We then show a compact method of implementing p-bits by using VC-MTJs without a bias current. As a demonstration of the feasibility of the proposed p-bits and high quality of the generated random numbers, we solve up to 40 bit integer factorization problems using experimental bit-streams generated by VC-MTJs. Our proposal can impact the development of p-computers, both by supporting a fully spintronic implementation of a p-bit, and alternatively, by enabling true random number generation at low cost for ultralow-power and compact p-computers implemented in complementary metal-oxide semiconductor chips.
more » « less- PAR ID:
- 10475418
- Publisher / Repository:
- IOP
- Date Published:
- Journal Name:
- Nanotechnology
- Volume:
- 34
- Issue:
- 49
- ISSN:
- 0957-4484
- Page Range / eLocation ID:
- 495203
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
More Like this
-
more » « less
Abstract -
more » « less
Abstract Execution of probabilistic computing algorithms require electrically programmable stochasticity to encode arbitrary probability functions and controlled stochastic interaction or correlation between probabilistic (p-) bits. The latter is implemented with complex electronic components leaving a large footprint on a chip and dissipating excessive amount of energy. Here, we show an elegant implementation with just two dipole-coupled magneto-tunneling junctions (MTJ), with magnetostrictive soft layers, fabricated on a piezoelectric film. The resistance states of the two MTJs (high or low) encode the p-bit values (1 or 0) in the two streams. The first MTJ is driven to a resistance state with desired probability via a current or voltage that generates spin transfer torque, while the second MTJ’s resistance state is determined by dipole coupling with the first, thus correlating the second p-bit stream with the first. The effect of dipole coupling can be varied by generating local strain in the soft layer of the second MTJ with a local voltage (~ 0.2 V) and that varies the degree of anti-correlation between the resistance states of the two MTJs and hence between the two streams (from 0 to 100%). This paradigm generates the anti-correlation with “wireless” dipole coupling that consumes no footprint on a chip and dissipates no energy, and it controls the degree of anti-correlation with electrically generated strain that consumes minimal footprint and is extremely frugal in its use of energy. It can be extended to arbitrary number of bit streams. This realizes an “all-magnetic” platform for generating correlations or anti-correlations for probabilistic computing. It also implements a simple 2-node Bayesian network.
-
Probabilistic computing is a computing scheme that offers a more efficient approach than conventional complementary metal-oxide–semiconductor (CMOS)-based logic in a variety of applications ranging from optimization to Bayesian inference, and invertible Boolean logic. The probabilistic bit (or p-bit, the base unit of probabilistic computing) is a naturally fluctuating entity that requires tunable stochasticity; by coupling low-barrier stochastic magnetic tunnel junctions (MTJs) with a transistor circuit, a compact implementation is achieved. In this work, by combining stochastic MTJs with 2D-MoS2field-effect transistors (FETs), we demonstrate an on-chip realization of a p-bit building block displaying voltage-controllable stochasticity. Supported by circuit simulations, we analyze the three transistor-one magnetic tunnel junction (3T-1MTJ) p-bit design, evaluating how the characteristics of each component influence the overall p-bit output. While the current approach has not reached the level of maturity required to compete with CMOS-compatible MTJ technology, the design rules presented in this work are valuable for future experimental implementations of scaled on-chip p-bit networks with reduced footprint.more » « less
-
Abstract Magnetic random-access memory (MRAM) based on voltage-controlled magnetic anisotropy in magnetic tunnel junctions (MTJs) is a promising candidate for high-performance computing applications, due to its lower power consumption, higher bit density, and the ability to reduce the access transistor size when compared to conventional current-controlled spin-transfer torque MRAM. The key to realizing these advantages is to have a low MTJ switching voltage. Here, we report a perpendicular MTJ structure with a high voltage-controlled magnetic anisotropy coefficient ~130 fJ/Vm and high tunnel magnetoresistance exceeding 150%. Owing to the high voltage-controlled magnetic anisotropy coefficient, we demonstrate sub-nanosecond precessional switching of nanoscale MTJs with diameters of 50 and 70 nm, using a voltage lower than 1 V. We also show scaling of this switching mechanism down to 30 nm MTJs, with voltages close to 2 V. The results pave the path for the future development and application of voltage-controlled MRAMs and spintronic devices in emerging computing systems.more » « less
-
more » « less
Abstract With the fast growth of the number of electronic devices on the internet of things (IoT), hardware‐based security primitives such as physically unclonable functions (PUFs) have emerged to overcome the shortcomings of conventional software‐based cryptographic technology. Existing PUFs exploit manufacturing process variations in a semiconductor foundry technology. This results in a static challenge–response behavior, which can present a long‐term security risk. This study shows a reconfigurable PUF based on nanoscale magnetic tunnel junction (MTJ) arrays that uses stochastic dynamics induced by voltage‐controlled magnetic anisotropy (VCMA) for true random bit generation. A total of 100 PUF instances are implemented using 10 ns voltage pulses on a single chip with a 10 × 10 MTJ array. The unipolar nature of the VCMA mechanism is exploited to stabilize the MTJ state and eliminate bit errors during readout. All PUF instances show entropy close to one, inter‐Hamming distance close to 50%, and no bit errors in 104repeated readout measurements.
- Free Publicly Accessible Full Text
-
Accepted Manuscript1.0
- Journal Article:
- https://doi.org/10.1088/1361-6528/acf6c7
