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Title: Accelerating Low Bit-width Neural Networks at the Edge, PIM or FPGA: A Comparative Study
Deep Neural Network (DNN) acceleration with digital Processing-in-Memory (PIM) platforms at the edge is an actively-explored domain with great potential to not only address memory-wall bottlenecks but to offer orders of performance improvement in comparison to the von-Neumann architecture. On the other side, FPGA-based edge computing has been followed as a potential solution to accelerate compute-intensive workloads. In this work, adopting low-bit-width neural networks, we perform a solid and comparative inference performance analysis of a recent processing-in-SRAM tape-out with a low-resource FPGA board and a high-performance GPU to provide a guideline for the research community. We explore and highlight the key architectural constraints of these edge candidates that impact their overall performance. Our experimental data demonstrate that the processing-in-SRAM can obtain up to ~160x speed-up and up to 228x higher efficiency (img/s/W) compared to the under-test FPGA on the CIFAR-10 dataset.  more » « less
Award ID(s):
2228028
PAR ID:
10476521
Author(s) / Creator(s):
; ; ; ;
Publisher / Repository:
ACM
Date Published:
Journal Name:
GLSVLSI '23: Proceedings of the Great Lakes Symposium on VLSI 2023
ISBN:
9798400701252
Page Range / eLocation ID:
625 to 630
Format(s):
Medium: X
Location:
Knoxville TN USA
Sponsoring Org:
National Science Foundation
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