Two-dimensional (2D) materials offer exciting possibilities for numerous applications, including next-generation sensors and field-effect transistors (FETs). With their atomically thin form factor, it is evident that molecular activity at the interfaces of 2D materials can shape their electronic properties. Although much attention has focused on engineering the contact and dielectric interfaces in 2D material-based transistors to boost their drive current, less is understood about how to tune these interfaces to improve the long-term stability of devices. In this work, we evaluated molybdenum disulfide (MoS2) transistors under continuous electrical stress for periods lasting up to several days. During stress in ambient air, we observed temporary threshold voltage shifts that increased at higher gate voltages or longer stress durations, correlating to changes in interface trap states (ΔNit) of up to 1012 cm–2. By modifying the device to include either SU-8 or Al2O3 as an additional dielectric capping layer on top of the MoS2 channel, we were able to effectively reduce or even eliminate this unstable behavior. However, we found this encapsulating material must be selected carefully, as certain choices actually amplified instability or compromised device yield, as was the case for Al2O3, which reduced yield by 20% versus all other capping layers. Further refining these strategies to preserve stability in 2D devices will be crucial for their continued integration into future technologies.
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Two-Terminal MoS 2 Memristor and the Homogeneous Integration with a MoS 2 Transistor for Neural Networks
Memristors are promising candidates for constructing neural networks. However, their dissimilar working mechanism to that of the addressing transistors can result in a scaling mismatch, which may hinder efficient integration. Here, we demonstrate two-terminal MoS2 memristors that work with a charge-based mechanism similar to that in transistors, which enables the homogeneous integration with MoS2 transistors to realize one-transistor-one-memristor addressable cells for assembling programmable network. The homogenously integrated cells are implemented in a 2×2 network array to demonstrate the enabled addressability and programmability. The potential for assembling scalable network is evaluated in a simulated neural network using obtained realistic device parameters, which achieves over 91% pattern recognition accuracy. This study also reveals a generic mechanism and strategy that can be applied to other semiconducting devices for the engineering and homogeneous integration of memristive systems.
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- PAR ID:
- 10477370
- Publisher / Repository:
- ACS publications
- Date Published:
- Journal Name:
- Nano Letters
- Volume:
- 23
- Issue:
- 13
- ISSN:
- 1530-6984
- Page Range / eLocation ID:
- 5869 to 5876
- Subject(s) / Keyword(s):
- memristor neural network MoS2 2D materials transistor
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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