skip to main content

Title: Enhancement-Mode AlInN/GaN High-Electron-Mobility Transistors Enabled by Thermally Oxidized Gates
Enhancement mode AlInN/gallium nitride (GaN) high-electron-mobility transistors (HEMTs) are fabricated by thermally oxidizing the barrier region under the gate. The oxidation is performed at 850 ∘ C in O 2 , and a SiN x mask is used to achieve selective oxidization of the AlInN layer. For comparison, a standard Schottky gate and atomic layer deposition (ALD) Al 2 O 3 metal–insulator–semiconductor (MIS) HEMTs are fabricated from the same structure and show depletion mode behavior as expected. Scanning transmission electron microscopy (STEM) and energy-dispersive X-ray spectroscopy (EDS) mappings are performed to characterize the gate of the oxidized HEMTs, showing complete oxidation of the AlInN barrier. All the devices are tested to determine their transfer and output characteristics. The results show that the thermally oxidized gate produces a positive shift in threshold voltage at ∼ 4 V and low currents ( ∼ 2 × 10 −7 mA/mm) at zero gate voltage. The oxidized HEMTs are also subjected to postmetallization annealing (PMA) at 400 ∘ C and 500 ∘ C for 10 min flowing 1000 sccm of N 2 , retaining enhancement mode behavior and leading to a further positive shift in threshold voltage.  more » « less
Award ID(s):
2212639 2145340
Author(s) / Creator(s):
; ; ;
Publisher / Repository:
IEEE Transactions on Electron Devices
Date Published:
Journal Name:
IEEE transactions on electron devices
Page Range / eLocation ID:
1 to 7
Medium: X
Sponsoring Org:
National Science Foundation
More Like this
  1. We report the electrical properties of Al0.3Ga0.7N/GaN heterojunction field effect transistor (HFET) structures with a Ga2O3 passivation layer grown by metal–organic chemical vapor deposition (MOCVD). In this study, three different thicknesses of β-Ga2O3 dielectric layers were grown on Al0.3Ga0.7N/GaN structures leading to metal-oxide-semiconductor-HFET or MOSHFET structures. X-ray diffraction (XRD) showed the (2¯01) orientation peaks of β-Ga2O3 in the device structure. The van der Pauw and Hall measurements yield the electron density of ~ 4 × 1018 cm−3 and mobility of ~770 cm2V−1s−1 in the 2-dimensional electron gas (2DEG) channel at room temperature. Capacitance–voltage (C-V) measurement for the on-state 2DEG density for the MOSHFET structure was found to be of the order of ~1.5 × 1013 cm−2. The thickness of the Ga2O3 layer was inversely related to the threshold voltage and the on-state capacitance. The interface charge density between the oxide and Al0.3Ga0.7N barrier layer was found to be of the order of ~1012 cm2eV−1. A significant reduction in leakage current from ~10−4 A/cm2 for HFET to ~10−6 A/cm2 for MOSHFET was observed well beyond pinch-off in the off-stage at -20 V applied gate voltage. The annealing at 900° C of the MOSHFET structures revealed that the Ga2O3 layer was thermally stable at high temperatures resulting in insignificant threshold voltage shifts for annealed samples with respect to as-deposited (unannealed) structures. Our results show that the MOCVD-gown Ga2O3 dielectric layers can be a strong candidate for stable high-power devices. 
    more » « less
  2. Abstract

    Radiation susceptibility of electronic devices is commonly studied as a function of radiation energetics and device physics. Often overlooked is the presence or magnitude of the electrical field, which we hypothesize to play an influential role in low energy radiation. Accordingly, we present a comprehensive study of low-energy proton irradiation on gallium nitride high electron mobility transistors (HEMTs), turning the transistor ON or OFF during irradiation. Commercially available GaN HEMTs were exposed to 300 keV proton irradiation at fluences varying from 3.76 × 1012to 3.76 × 1014cm2, and the electrical performance was evaluated in terms of forward saturation current, transconductance, and threshold voltage. The results demonstrate that the presence of an electrical field makes it more susceptible to proton irradiation. The decrease of 12.4% in forward saturation and 19% in transconductance at the lowest fluence in ON mode suggests that both carrier density and mobility are reduced after irradiation. Additionally, a positive shift in threshold voltage (0.32 V and 0.09 V in ON and OFF mode, respectively) indicates the generation of acceptor-like traps due to proton bombardment. high-resolution transmission electron microscopy and energy dispersive x-ray spectroscopy analysis reveal significant defects introduction and atom intermixing near AlGaN/GaN interfaces and within the GaN layer after the highest irradiation dose employed in this study. According toin-situRaman spectroscopy, defects caused by irradiation can lead to a rise in self-heating and a considerable increase in (∼750 times) thermoelastic stress in the GaN layer during device operation. The findings indicate device engineering or electrical biasing protocol must be employed to compensate for radiation-induced defects formed during proton irradiation to improve device durability and reliability.

    more » « less
  3. In this work, we report a study of the temperature dependent pulsed current voltage and RF characterization of [Formula: see text]-(Al x Ga 1−x ) 2 O 3 /Ga 2 O 3 hetero-structure FETs (HFETs) before and after silicon nitride (Si 3 N 4 ) passivation. Under sub-microsecond pulsing, a moderate DC-RF dispersion (current collapse) is observed before passivation in gate lag measurements, while no current collapse is observed in the drain lag measurements. The dispersion in the gate lag is possibly attributed to interface traps in the gate–drain access region. DC-RF dispersion did not show any strong dependence on the pulse widths. Temperature dependent RF measurements up to 250 °C do not show degradation in the cutoff frequencies. After Si 3 N 4 deposition at 350 °C, a shift of the threshold voltage is observed which changed the DC characteristics. However, the current collapse is eliminated; at 200 ns pulse widths, a 50% higher current is observed compared to the DC at high drain voltages. No current collapse is observed even at higher temperatures. RF performance of the passivated devices does not show degradation. These results show that ex situ deposited Si 3 N 4 is a potential candidate for passivation of [Formula: see text]-(Al x Ga 1−x ) 2 O 3 /Ga 2 O 3 HFETs. 
    more » « less
  4. Abstract

    New deposition techniques for amorphous oxide semiconductors compatible with silicon back end of line manufacturing are needed for 3D monolithic integration of thin‐film electronics. Here, three atomic layer deposition (ALD) processes are compared for the fabrication of amorphous zinc tin oxide (ZTO) channels in bottom‐gate, top‐contact n‐channel transistors. As‐deposited ZTO films, made by ALD at 150–200 °C, exhibit semiconducting, enhancement‐mode behavior with electron mobility as high as 13 cm2V−1s−1, due to a low density of oxygen‐related defects. ZTO deposited at 200 °C using a hybrid thermal‐plasma ALD process with an optimal tin composition of 21%, post‐annealed at 400 °C, shows excellent performance with a record high mobility of 22.1 cm2V–1s–1and a subthreshold slope of 0.29 V dec–1. Increasing the deposition temperature and performing post‐deposition anneals at 300–500 °C lead to an increased density of the X‐ray amorphous ZTO film, improving its electrical properties. By optimizing the ZTO active layer thickness and using a high‐kgate insulator (ALD Al2O3), the transistor switching voltage is lowered, enabling electrical compatibility with silicon integrated circuits. This work opens the possibility of monolithic integration of ALD ZTO‐based thin‐film electronics with silicon integrated circuits or onto large‐area flexible substrates.

    more » « less
    more » « less