Here we benchmark device-to-device variation in field-effect transistors (FETs) based on monolayer MoS2and WS2films grown using metal-organic chemical vapor deposition process. Our study involves 230 MoS2FETs and 160 WS2FETs with channel lengths ranging from 5 μm down to 100 nm. We use statistical measures to evaluate key FET performance indicators for benchmarking these two-dimensional (2D) transition metal dichalcogenide (TMD) monolayers against existing literature as well as ultra-thin body Si FETs. Our results show consistent performance of 2D FETs across 1 × 1 cm2chips owing to high quality and uniform growth of these TMDs followed by clean transfer onto device substrates. We are able to demonstrate record high carrier mobility of 33 cm2 V−1 s−1in WS2FETs, which is a 1.5X improvement compared to the best reported in the literature. Our experimental demonstrations confirm the technological viability of 2D FETs in future integrated circuits.
To support the ever-growing demand for faster, energy-efficient computation, more aggressive scaling of the transistor is required. Two-dimensional (2D) transition metal dichalcogenides (TMDs), with their ultra-thin body, excellent electrostatic gate control, and absence of surface dangling bonds, allow for extreme scaling of the channel region without compromising the mobility. New device geometries, such as stacked nanosheets with multiple parallel channels for carrier flow, can facilitate higher drive currents to enable ultra-fast switches, and TMDs are an ideal candidate for that type of next generation front-end-of-line field effect transistor (FET). TMDs are also promising for monolithic 3D (M3D) integrated back-end-of-line FETs due to their ability to be grown at low temperature and with less regard to lattice matching through van der Waals (vdW) epitaxy. To achieve TMD FETs with superior performance, two important challenges must be addressed: (1) complementary n- and p-type FETs with small and reliable threshold voltages are required for the reduction of dynamic and static power consumption per logic operation, and (2) contact resistance must be reduced significantly. We present here the underlying strengths and weaknesses of the wide variety of methods under investigation to provide scalable, stable, and controllable doping. It is our Perspective that of all the available doping methods, substitutional doping offers the ultimate solution for TMD-based transistors.
more » « less- Award ID(s):
- 1921818
- NSF-PAR ID:
- 10486465
- Publisher / Repository:
- Applied Physics Letters
- Date Published:
- Journal Name:
- Applied Physics Letters
- Volume:
- 122
- Issue:
- 16
- ISSN:
- 0003-6951
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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Abstract Semiconductive transition metal dichalcogenides (TMDs) have been considered as next generation semiconductors, but to date most device investigations are still based on microscale exfoliation with a low yield. Wafer scale growth of TMDs has been reported but effective doping approaches remain challenging due to their atomically thick nature. This work reports the synthesis of wafer‐scale continuous few‐layer PtSe2films with effective doping in a controllable manner. Chemical component analyses confirm that both n‐doping and p‐doping can be effectively modulated through a controlled selenization process. The electrical properties of PtSe2films have been systematically studied by fabricating top‐gated field effect transistors (FETs). The device current on/off ratio is optimized in two‐layer PtSe2FETs, and four‐terminal configuration displays a reasonably high effective field effect mobility (14 and 15 cm2V−1s−1for p‐type and n‐type FETs, respectively) with a nearly symmetric p‐type and n‐type performance. Temperature dependent measurement reveals that the variable range hopping is dominant at low temperatures. To further establish feasible application based on controllable doping of PtSe2, a logic inverter and vertically stacked p–n junction arrays are demonstrated. These results validate that PtSe2is a promising candidate among the family of TMDs for future functional electronic applications.
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Abstract From its inception, extensive work on the characterization of field effect transistors (FETs) based on 2D‐layered semiconductors has relied on a back‐gated transistor architecture. This is useful for initial assessment but lacks ultimate compatibility with integrated circuit (IC) design since the threshold voltage of individual devices cannot be controlled independently in order to achieve specific ON‐state and OFF‐state performance. Note that threshold engineering via gate electrostatics is inevitable for 2D semiconductors owing to the absence of comprehensive, reliable, and universal doping schemes. In recent years, several strategies are adopted for the gating of individual 2D‐FETs such as atomic layer deposition (ALD) of high‐
k dielectrics, drop casting of ionic liquids, and deterministic transfer of insulating 2D hexagonal boron nitride. These techniques have their respective strengths and weaknesses. A facile, low‐temperature, scalable, and universally applicable fabrication scheme for dual‐gated monolayer 2D‐FETs is reported here, which is compatible with the back‐end‐of‐the‐line (BEOL) process flow of complementary metal oxide semiconductor (CMOS) technology, using hydrogen silsesquioxane (HSQ). HSQ is a negative tone resist that possesses dielectric properties similar to SiO2when exposed to high electron beam irradiation and thermal curing and can produce features as small as 10 nm. -
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Wafer-scale synthesis of p-type TMD films is critical for its commercialization in next-generation electro/optoelectronics. In this work, wafer-scale intrinsic n-type WS2films and in situ Nb-doped p-type WS2films were synthesized through atomic layer deposition (ALD) on 8-inch
α -Al2O3/Si wafers, 2-inch sapphire, and 1 cm2GaN substrate pieces. The Nb doping concentration was precisely controlled by altering cycle number of Nb precursor and activated by postannealing. WS2n-FETs and Nb-doped p-FETs with different Nb concentrations have been fabricated using CMOS-compatible processes. X-ray photoelectron spectroscopy, Raman spectroscopy, and Hall measurements confirmed the effective substitutional doping with Nb. The on/off ratio and electron mobility of WS2n-FET are as high as 105and 6.85 cm2 V-1 s-1, respectively. In WS2p-FET with 15-cycle Nb doping, the on/off ratio and hole mobility are 10 and 0.016 cm2 V-1 s-1, respectively. The p-n structure based on n- and p- type WS2films was proved with a 104rectifying ratio. The realization of controllablein situ Nb-doped WS2films paved a way for fabricating wafer-scale complementary WS2FETs. -
Ambipolar dual-gate transistors based on low-dimensional materials, such as graphene, carbon nanotubes, black phosphorus, and certain transition metal dichalcogenides (TMDs), enable reconfigurable logic circuits with a suppressed off-state current. These circuits achieve the same logical output as complementary metal–oxide semiconductor (CMOS) with fewer transistors and offer greater flexibility in design. The primary challenge lies in the cascadability and power consumption of these logic gates with static CMOS-like connections. In this article, high-performance ambipolar dual-gate transistors based on tungsten diselenide (WSe2) are fabricated. A high on–off ratio of 108 and 106, a low off-state current of 100 to 300 fA, a negligible hysteresis, and an ideal subthreshold swing of 62 and 63 mV/dec are measured in the p- and n-type transport, respectively. We demonstrate cascadable and cascaded logic gates using ambipolar TMD transistors with minimal static power consumption, including inverters, XOR, NAND, NOR, and buffers made by cascaded inverters. A thorough study of both the control gate and the polarity gate behavior is conducted. The noise margin of the logic gates is measured and analyzed. The large noise margin enables the implementation of VT-drop circuits, a type of logic with reduced transistor number and simplified circuit design. Finally, the speed performance of the VT-drop and other circuits built by dual-gate devices is qualitatively analyzed. This work makes advancements in the field of ambipolar dual-gate TMD transistors, showing their potential for low-power, high-speed, and more flexible logic circuits.more » « less
- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Journal Article:
- https://doi.org/10.1063/5.0133064
