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1. Divisors computing minimal log discrepancies on lc surfaces

   https://doi.org/10.1017/S0305004123000051  

   LIU, JIHAO; XIE, LINGYAO (July 2023, Mathematical Proceedings of the Cambridge Philosophical Society)

   Abstract Let$$(X\ni x,B)$$be an lc surface germ. If$$X\ni x$$is klt, we show that there exists a divisor computing the minimal log discrepancy of$$(X\ni x,B)$$that is a Kollár component of$$X\ni x$$. If$$B\not=0$$or$$X\ni x$$is not Du Val, we show that any divisor computing the minimal log discrepancy of$$(X\ni x,B)$$is a potential lc place of$$X\ni x$$. This extends a result of Blum and Kawakita who independently showed that any divisor computing the minimal log discrepancy on a smooth surface is a potential lc place. 

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2. Existence of flips for generalized $$\operatorname{lc}$$ pairs

   https://doi.org/10.4310/CJM.2023.v11.n4.a1  

   Hacon, Christopher D; Liu, Jihao (September 2023, Cambridge Journal of Mathematics)
3. On generalized lc pairs with b-log abundant nef part

   Jiao, J; Liu, J; Xie, L (February 2022, arXiv)
4. Monitoring Wound Health through Bandages with Passive LC Resonant Sensors

   https://doi.org/10.1021/acssensors.0c01912  

   Charkhabi, Sadaf; Jackson, Kyle J.; Beierle, Andee M.; Carr, Adam R.; Zellner, Eric M.; Reuel, Nigel F. (January 2021, ACS Sensors)

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5. Active Class-C LC Phase Shifter with Automatic Amplitude Control

   Sohani_Darban, Meysam; Lohrabi_Pour, Fariborz; Ha, Dong S; Walling, Jeffrey S (June 2024, IEEE (Proceedings of the 2024 IEEE NEWCAS Conference))

   This paper introduces an automatic amplitude control (AAC) mechanism implemented on a class-C LC-based phase shifter. The AAC technique compensates for the amplitude attenuation of the phase shifter as a function of frequency and provides output swing control that enhances the suitability as a phase shifter in the auxiliary path of a load-modulated balanced power amplifier (LMB-PA). It can be utilized to calibrate and fine-tune the power amplifier (PA) performance after fabrication to achieve optimal performance. The circuit is designed and laid out using 22−nm FD-SOI process technology. To demonstrate the proposed idea, the frequency of operation was chosen as 2.4 GHz. The total power consumption varies between 0.52 − 1 mW due to phase control from 0 − 120◦ with 0.085 dB amplitude error. 

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