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1. Fault-tolerant hyperbolic Floquet quantum error correcting codes

   https://doi.org/10.22331/q-2025-09-05-1849  

   Fahimniya, Ali; Dehghani, Hossein; Bharti, Kishor; Mathew, Sheryl; Kollár, Alicia J; Gorshkov, Alexey V; Gullans, Michael J (September 2025, Quantum)

   A central goal in quantum error correction is to reduce the overhead of fault-tolerant quantum computing by increasing noise thresholds and reducing the number of physical qubits required to sustain a logical qubit. We introduce a potential path towards this goal based on a family of dynamically generated quantum error correcting codes that we call hyperbolic Floquet codes.'' These codes are defined by a specific sequence of non-commuting two-body measurements arranged periodically in time that stabilize a topological code on a hyperbolic manifold with negative curvature. We focus on a family of lattices for $n$ qubits that, according to our prescription that defines the code, provably achieve a finite encoding rate $(1/8+2/n)$ while still requiring only two-body measurements. Similar to hyperbolic surface codes, the distance of the code at each time-step scales at most logarithmically in $n$ . The family of lattices we choose indicates that this scaling is achievable in practice. We develop and benchmark an efficient matching-based decoder that provides evidence of a threshold near 0.1% in a phenomenological noise model and 0.25% in an entangling measurements noise model. Utilizing weight-two check operators and a qubit connectivity of 3, one of our hyperbolic Floquet codes uses 400 physical qubits to encode 52 logical qubits with a code distance of 8, i.e., it is a $\left[\right[400,52,8\left]\right]$ code. At small error rates, comparable logical error suppression to this code requires 5x as many physical qubits (1924) when using the honeycomb Floquet code with the same noise model and decoder. 

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2. Fast and Parallelizable Logical Computation with Homological Product Codes

   https://doi.org/10.1103/PhysRevX.15.021065  

   Xu, Qian; Zhou, Hengyun; Zheng, Guo; Bluvstein, Dolev; Ataides, J_Pablo Bonilla; Lukin, Mikhail D; Jiang, Liang (May 2025, Physical Review X)

   Quantum error correction is necessary to perform large-scale quantum computation but requires extremely large overheads in both space and time. High-rate quantum low-density-parity-check (qLDPC) codes promise a route to reduce qubit numbers, but performing computation while maintaining low space cost has required serialization of operations and extra time costs. In this work, we design fast and parallelizable logical gates for qLDPC codes and demonstrate their utility for key algorithmic subroutines such as the quantum adder. Our gate gadgets utilize transversal logical s between a data qLDPC code and a suitably constructed ancilla code to perform parallel Pauli product measurements (PPMs) on the data logical qubits. For hypergraph product codes, we show that the ancilla can be constructed by simply modifying the base classical codes of the data code, achieving parallel PPMs on a subgrid of the logical qubits with a lower space-time cost than existing schemes for an important class of circuits. Generalizations to 3D and 4D homological product codes further feature fast PPMs in constant depth. While prior work on qLDPC codes has focused on individual logical gates, we initiate the study of fault-tolerant compilation with our expanded set of native qLDPC code operations, constructing algorithmic primitives for preparing $k$ -qubit Greenberger-Horne-Zeilinger states and distilling or teleporting $k$ magic states with $O\left(1\right)$ space overhead in $O\left(1\right)$ and $O\left(\sqrt{k}\log k\right)$ logical cycles, respectively. We further generalize this to key algorithmic subroutines, demonstrating the efficient implementation of quantum adders using parallel operations. Our constructions are naturally compatible with reconfigurable architectures such as neutral atom arrays, paving the way to large-scale quantum computation with low space and time overheads. Published by the American Physical Society2025 

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3. Non-Clifford Gates between Stabilizer Codes via Non-Abelian Topological Order

   https://doi.org/10.1103/qttm-y8t1  

   Sajith, Rohith; Song, Zijian; Roberts, Brenden; Menon, Varun; Li, Yabo (March 2026, PRX Quantum)

   We propose protocols to implement non-Clifford logical gates between stabilizer codes by entangling into a non-Abelian topological order as an intermediate step. Generalizing previous approaches, we provide a framework that generates a large class of non-Clifford and nondiagonal logical gates between qudit surface codes by gauging the topological symmetry of symmetry-enriched topological orders. As our main example, we concretely detail a protocol that utilizes the quantum double of $S_3$ to generate a controlled-charge-conjugation ( $C\mathcal{C}$ ) gate between a qubit and qutrit surface code. Both the preparation of non-Abelian states and logical state injection between the Abelian and non-Abelian codes are executed via finite-depth quantum circuits with measurement and feedforward. We discuss aspects of the fault tolerance of our protocol, presenting insights into how to construct a heralded decoder for the quantum double of $S_3$ . We also outline how analogous protocols can be used to obtain logical gates between qudit surface codes by entangling into $\mathcal{D}\left(G\right),$ where $G$ is a semidirect product of Abelian groups. This work serves as a step toward classifying the computational power of non-Abelian quantum phases beyond the paradigm of anyon braiding on near-term quantum devices. 

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4. Magic Tricycles: Efficient Magic-State Generation with Finite Block-Length Quantum LDPC Codes

   https://doi.org/10.1103/ghhp-cytl  

   Menon, Varun; Bonilla_Ataides, J Pablo; Mehta, Rohan; Gu, Andi; Tan, Daniel Bochen; Lukin, Mikhail D (April 2026, Physical Review X)

   The preparation of high-fidelity non-Clifford (magic) states is an essential subroutine for universal quantum computation but imposes substantial space-time overhead. Magic-state factories based on high-rate and -distance quantum low-density parity-check (LDPC) codes equipped with transversal non-Clifford gates can potentially reduce these overheads significantly, by circumventing the need for multiple rounds of distillation and by producing a large number of magic states in a single code block. As a step toward realizing efficient, fault-tolerant magic-state production, we introduce a class of finite block-length quantum LDPC codes which we name tricycle codes, generalizing the well-known bicycle codes to three homological dimensions. These codes can support constant-depth physical circuits that implement logical $CCZ$ gates between three code blocks. To construct these constant-depth $CCZ$ circuits, we develop analytical and numerical techniques that apply to a broad class of three-dimensional homological and balanced-product codes. We further show that tricycle codes enable single-shot state preparation and error correction, leading to a highly efficient magic-state generation protocol. Numerical simulations of specific codes confirm robust performance under circuit-level noise, demonstrating a high circuit-noise threshold of $>0.5\%$ . With modest postselection, certain tricycle codes of block lengths of only approximately 50–100 qubits are shown to produce $|\overline{CCZ}⟩$ magic states with logical error rates ranging from $2\times {10}^{-8}$ to below $3\times {10}^{-11}$ . Finally, we construct optimal depth syndrome extraction circuits for tricycle codes and present a protocol for implementing them efficiently on a reconfigurable neutral-atom platform. 

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5. Synthesis of Logical Clifford Operators via Symplectic Geometry

   Rengaswamy, Narayanan; Calderbank, Robert; Kadhe, Swanand; Pfister, Henry D. (January 2018, IEEE International Symposium on Information Theory)

   Quantum error-correcting codes can be used to protect qubits involved in quantum computation. This requires that logical operators acting on protected qubits be translated to physical operators (circuits) acting on physical quantum states. We propose a mathematical framework for synthesizing physical circuits that implement logical Clifford operators for stabilizer codes. Circuit synthesis is enabled by representing the desired physical Clifford operator in CN ×N as a 2m × 2m binary sym- plectic matrix, where N = 2m. We show that for an [m, m − k] stabilizer code every logical Clifford operator has 2k(k+1)/2 symplectic solutions, and we enumerate them efficiently using symplectic transvections. The desired circuits are then obtained by writing each of the solutions as a product of elementary symplectic matrices. For a given operator, our assembly of all of its physical realizations enables optimization over them with respect to a suitable metric. Our method of circuit synthesis can be applied to any stabilizer code, and this paper provides a proof of concept synthesis of universal Clifford gates for the well- known [6, 4, 2] code. Programs implementing our algorithms can be found at https://github.com/nrenga/symplectic-arxiv18a. 

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