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1. Modular Quantum Processor with an All-to-All Reconfigurable Router

   https://doi.org/10.1103/PhysRevX.14.041030  

   Wu, Xuntao; Yan, Haoxiong; Andersson, Gustav; Anferov, Alexander; Chou, Ming-Han; Conner, Christopher R; Grebel, Joel; Joshi, Yash J; Li, Shiheng; Miller, Jacob M; et al (November 2024, Physical Review X)

   Superconducting qubits provide a promising approach to large-scale fault-tolerant quantum computing. However, qubit connectivity on a planar surface is typically restricted to only a few neighboring qubits. Achieving longer-range and more flexible connectivity, which is particularly appealing in light of recent developments in error-correcting codes, however, usually involves complex multilayer packaging and external cabling, which is resource intensive and can impose fidelity limitations. Here, we propose and realize a high-speed on-chip quantum processor that supports reconfigurable all-to-all coupling with a large on-off ratio. We implement the design in a four-node quantum processor, built with a modular design comprising a wiring substrate coupled to two separate qubit-bearing substrates, each including two single-qubit nodes. We use this device to demonstrate reconfigurable controlled- $Z$gates across all qubit pairs, with a benchmarked average fidelity of $96.00\%\pm 0.08\%$and best fidelity of $97.14\%\pm 0.07\%$, limited mainly by dephasing in the qubits. We also generate multiqubit entanglement, distributed across the separate modules, demonstrating GHZ-3 and GHZ-4 states with fidelities of $88.15\%\pm 0.24\%$and $75.18\%\pm 0.11\%$, respectively. This approach promises efficient scaling to larger-scale quantum circuits and offers a pathway for implementing quantum algorithms and error-correction schemes that benefit from enhanced qubit connectivity. Published by the American Physical Society2024 

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2. Quantum routing with teleportation

   https://doi.org/10.1103/PhysRevResearch.6.033313  

   Devulapalli, Dhruv; Schoute, Eddie; Bapat, Aniruddha; Childs, Andrew M; Gorshkov, Alexey V (September 2024, Physical Review Research)

   We study the problem of implementing arbitrary permutations of qubits under interaction constraints in quantum systems that allow for arbitrarily fast local operations and classical communication (LOCC). In particular, we show examples of speedups over swap-based and more general unitary routing methods by distributing entanglement and using LOCC to perform quantum teleportation. We further describe an example of an interaction graph for which teleportation gives a logarithmic speedup in the worst-case routing time over swap-based routing. We also study limits on the speedup afforded by quantum teleportation—showing an $O\left(\sqrt{NlogN}\right)$upper bound on the separation in routing time for any interaction graph—and give tighter bounds for some common classes of graphs. Published by the American Physical Society2024 

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3. Versatile Chip-Scale Platform for High-Rate Entanglement Generation Using an $\mathrm{Al}\mathrm{Ga}\mathrm{As}$ Microresonator Array

   https://doi.org/10.1103/PRXQuantum.6.010338  

   Pang, Yiming; Castro, Joshua E; Steiner, Trevor J; Duan, Liao; Tagliavacche, Noemi; Borghi, Massimo; Thiel, Lillian; Lewis, Nicholas; Bowers, John E; Liscidini, Marco; et al (March 2025, PRX Quantum)

   Integrated photonic microresonators have become an essential resource for generating photonic qubits for quantum information processing, entanglement distribution and networking, and quantum communications. The pair-generation rate is enhanced by reducing the microresonator radius, but this comes at the cost of increasing the frequency-mode spacing and reducing the quantum information spectral density. Here, we circumvent this rate-density trade-off in an $\mathrm{Al}\mathrm{Ga}\mathrm{As}$-on-insulator photonic device by multiplexing an array of 20 small-radius microresonators, each producing a 650-GHz-spaced comb of time-energy entangled-photon pairs. The resonators can be independently tuned via integrated thermo-optic heaters, enabling control of the mode spacing from degeneracy up to a full free spectral range. We demonstrate simultaneous pumping of five resonators with up to $50$-GHz relative comb offsets, where each resonator produces pairs exhibiting time-energy entanglement visibilities up to $95\mathrm{\%}$, coincidence-to-accidental ratios exceeding $5000$, and an on-chip pair rate up to $2.6{\mathrm{G}\mathrm{Hz}/\mathrm{mW}}^2$per comb line—an improvement over prior work by more than a factor of 40. As a demonstration, we generate frequency-bin qubits in a maximally entangled two-qubit Bell state with fidelity exceeding $87\mathrm{\%}$( $90\mathrm{\%}$with background correction) and detected frequency-bin entanglement rates up to 7 kHz (an approximately $70$MHz on-chip pair rate) using a pump power of approximately $250\text{μ}\mathrm{W}$. Multiplexing small-radius microresonators combines the key capabilities required for programmable and dense photonic qubit encoding while retaining high pair-generation rates, heralded single-photon purity, and entanglement fidelity. Published by the American Physical Society2025 

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4. The Floquet Fluxonium Molecule: Driving Down Dephasing in Coupled Superconducting Qubits

   https://doi.org/10.1103/PRXQuantum.5.040314  

   Thibodeau, Matthew; Kou, Angela; Clark, Bryan K (October 2024, PRX Quantum)

   High-coherence qubits, which can store and manipulate quantum states for long times with low error rates, are necessary building blocks for quantum computers. Here we propose a driven superconducting erasure qubit, the Floquet fluxonium molecule, which minimizes bit-flip rates through disjoint support of its qubit states and suppresses phase flips by a novel second-order insensitivity to flux-noise dephasing. We estimate the bit-flip, phase-flip, and erasure rates through numerical simulations, with predicted coherence times of approximately 50 ms in the computational subspace and erasure lifetimes of about $500\text{μ}\mathrm{s}$. We also present a protocol for performing high-fidelity single-qubit rotation gates via additional flux modulation, on timescales of roughly 500 ns, and propose a scheme for erasure detection and logical readout. Our results demonstrate the utility of drives for building new qubits that can outperform their static counterparts. Published by the American Physical Society2024 

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5. Fast and Parallelizable Logical Computation with Homological Product Codes

   https://doi.org/10.1103/PhysRevX.15.021065  

   Xu, Qian; Zhou, Hengyun; Zheng, Guo; Bluvstein, Dolev; Ataides, J_Pablo Bonilla; Lukin, Mikhail D; Jiang, Liang (May 2025, Physical Review X)

   Quantum error correction is necessary to perform large-scale quantum computation but requires extremely large overheads in both space and time. High-rate quantum low-density-parity-check (qLDPC) codes promise a route to reduce qubit numbers, but performing computation while maintaining low space cost has required serialization of operations and extra time costs. In this work, we design fast and parallelizable logical gates for qLDPC codes and demonstrate their utility for key algorithmic subroutines such as the quantum adder. Our gate gadgets utilize transversal logical s between a data qLDPC code and a suitably constructed ancilla code to perform parallel Pauli product measurements (PPMs) on the data logical qubits. For hypergraph product codes, we show that the ancilla can be constructed by simply modifying the base classical codes of the data code, achieving parallel PPMs on a subgrid of the logical qubits with a lower space-time cost than existing schemes for an important class of circuits. Generalizations to 3D and 4D homological product codes further feature fast PPMs in constant depth. While prior work on qLDPC codes has focused on individual logical gates, we initiate the study of fault-tolerant compilation with our expanded set of native qLDPC code operations, constructing algorithmic primitives for preparing $k$-qubit Greenberger-Horne-Zeilinger states and distilling or teleporting $k$magic states with $O\left(1\right)$space overhead in $O\left(1\right)$and $O\left(\sqrt{k}\log k\right)$logical cycles, respectively. We further generalize this to key algorithmic subroutines, demonstrating the efficient implementation of quantum adders using parallel operations. Our constructions are naturally compatible with reconfigurable architectures such as neutral atom arrays, paving the way to large-scale quantum computation with low space and time overheads. Published by the American Physical Society2025 

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