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As computing devices become more commonplace in every day life, we have seen an increase of possible attacks on commercial devices and critical infrastructure. As a result, both academia and industry have proposed solutions to mitigate or outright eliminate the ever expanding set of viable targets. Initially, this resulted in an influx of software-based defenses against these emerging threats. Unfortunately, it was found that software solutions could be bypassed with more advanced attacks and often resulted in high performance overhead. As such, hardware-assisted security defenses have been developed to provide improved security while keeping performance overhead to manageable levels, especially for IoT devices. In this paper, we will provide a survey of prominent hardware-assisted security defenses. We will enumerate the attacks these defenses aim to protect, as well as their effectiveness. We will also discuss the implications in both performance and system design. A comparison between approaches that target the same set of issues, and possible directions for future research will be presented.
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Extending RISC-V Keystone to Include Efficient Secure Memory
Given that mobile and embedded devices are at the center of day to day activities, they are often the target of cyber attacks. Despite their heightened security criticality, these devices do not often protect their data in memory. The reason for this lack of protections is resource limitations. In this work we propose an efficient mechanism to extend the Trusted Execution Environment (TEE) in RISC-V, Keystone, to include Secure Memory features to protect data in memory from physical and remote memory attacks.
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- Award ID(s):
- 2326835
- PAR ID:
- 10642949
- Publisher / Repository:
- Association for Computing Machinery (ACM)
- Date Published:
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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Accepted Manuscript1.0
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