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Ferroelectric tunnel junctions (FTJs) based on epitaxial complex oxide heterostructures are promising building blocks for developing low power nanoelectronics and neuromorphic computing. FTJs consisting of correlated oxide electrodes have distinct advantages in size scaling but only yield moderate electroresistance (ER) at room temperature due to the challenge in imposing asymmetric interfacial screening and large modulation of the tunneling potential profile. Here, we achieve large ER in all-oxide FTJs by paring a correlated metal with a narrow bandgap Mott insulator as electrodes. We fabricate epitaxial FTJs composed of 2.8 and 4 nm PbZr0.2Ti0.8O3 tunnel barriers sandwiched between correlated oxides LaNiO3 and Sr3Ir2O7 electrodes. An ER of 6500% has been observed at room temperature, which increases to over 105% at 100 K. The high ER can be attributed to ferroelectric polarization induced metal–insulator transition in interfacial Sr3Ir2O7, which enhances the potential asymmetry for the tunnel barrier. The temperature dependence of tunneling current shows that direct tunneling dominates in the on state, while the off-state conduction transitions from thermally activated behavior at high temperatures to Glazman–Matveev defect-mediated inelastic tunneling at low temperatures. Our study provides a viable material strategy for designing all-oxide FTJs with high ER, facilitating their implementation in nonvolatile memories and energy-efficient computing devices.
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This content will become publicly available on December 10, 2026
Gate-Tunable Electroresistance in a Sliding Ferroelectric Tunnel Junction
We fabricate and measure electrically-gated tunnel junctions in which the insulating barrier is a sliding van der Waals ferroelectric made from parallel-stacked bilayer hexagonal boron nitride and the electrodes are single-layer graphene. Despite the nominally-symmetric tunnel-junction structure, these devices can exhibit substantial electroresistance upon reversing the ferroelectric polarization. The magnitude and sign of tunneling electroresistance are tunable by bias and gate voltage. We show that this behavior can be understood within a simple tunneling model that takes into account the quantum capacitance of the graphene electrodes, so that the tunneling densities of states in the electrodes are separately modified as a function of bias and gate voltage.
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- Award ID(s):
- 2104268
- PAR ID:
- 10653471
- Publisher / Repository:
- American Chemical Society
- Date Published:
- Journal Name:
- Nano Letters
- ISSN:
- 1530-6984
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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