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1. Determining the Minimum Phase‐to‐Phase Gap Distance for Unconventional Transmission Lines Using Numerical Method

   https://doi.org/10.1049/gtd2.70140  

   Arafat, Easir; Ghassemi, Mona (August 2025, IET Generation, Transmission & Distribution)

   ABSTRACT With the increasing demand for power transmission, compact, high surge impedance loading (HSIL) high‐voltage transmission lines have emerged as a viable solution due to their reduced land acquisition costs and higher power delivery capability. The compactness of a transmission line depends on effective insulation coordination, particularly in determining the phase‐to‐phase clearance, which is governed by the critical flashover voltage under switching and lightning overvoltage conditions. Traditional methods for phase‐to‐phase clearance rely on empirical formulas derived from experimental data, which are convenient for conventional high‐voltage lines. However, unconventional HSIL lines require a faster and more adaptable evaluation method, as they involve optimized conductor positioning to reduce right‐of‐way requirements while enhancing natural power loadability. This study presents a simplified numerical approach to determine the minimum phase‐to‐phase gap, utilizing arc propagation viability curves, and offers an efficient alternative to conventional empirical methods. The proposed method was successfully applied to a 500 kV conventional line as well as 500 and 735 kV unconventional line designs, demonstrating its capability in accurately assessing insulation requirements. Results reveal that the method can support reduced gap clearances while still maintaining reliability, thereby validating its usefulness in optimizing compact transmission line configurations. 

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2. High-density integrated delay line using extreme skin-depth subwavelength grating waveguides

   https://doi.org/10.1364/OL.479003  

   Ahmed, Ishtiaque; Ahmed, Syed_Z; Jaidye, Nafiz; Borhan_Mia, Md; Bernussi, Ayrton; Kim, Sangsik (March 2023, Optics Letters)

   Optical delay lines control the flow of light in time, introducing phase and group delays for engineering interferences and ultrashort pulses. Photonic integration of such optical delay lines is essential for chip-scale lightwave signal processing and pulse control. However, typical photonic delay lines based on long spiral waveguides require extensively large chip footprints, ranging from mm²to cm²scales. Here we present a scalable, high-density integrated delay line using a skin-depth engineered subwavelength grating waveguide, i.e., an extreme skin-depth (eskid) waveguide. The eskid waveguide suppresses the crosstalk between closely spaced waveguides, significantly saving the chip footprint area. Our eskid-based photonic delay line is easily scalable by increasing the number of turns and should improve the photonic chip integration density. 

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3. 128-Channel Multi-Chip Acoustic Hologram Generator

   https://doi.org/10.23919/VLSITechnologyandCir65189.2025.11075058  

   Kustin, John; Kang, Taewook; Song, Seungheun; Naveed, Yahya; Flynn, Michael P (June 2025, IEEE)

   An ASIC combines a numerically controlled oscillator with reconfigurable amplitude and phase control of 16 channels to synthesize acoustic holograms with a phased array of ultrasonic transmitters. Multiple chiplets operate synchronously to drive arbitrarily many channels. A scalable digital delay line technique, leveraging on-chip SRAM and single-bit noise-shaped bitstreams, realizes area-efficient, high-density, and high-resolution true-time-delay phase shifts. The prototype system employs 8 chiplets to drive a 128-element array for hologram generation. 

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4. Hybrid Voltage Balancing Approach for Series-Connected SiC MOSFETs for DC–AC Medium-Voltage Power Conversion Applications

   https://doi.org/10.1109/TPEL.2022.3149146  

   Lin, Xiang; Ravi, Lakshmi; Burgos, Rolando; Dong, Dong (July 2022, IEEE Transactions on Power Electronics)

   Due to its fast switching speed, the voltage sharing of series-connected SiC MOSFETs is more sensitive to the parasitic components from the power modules and the system, which results in more challenges for voltage balancing control. For two series-connected SiC MOSFETs realized by one half-bridge module, the detailed analysis and measurement indicate that the unbalanced parasitic capacitors inside the power module comprise the dominant factor causing the difference of turn-off dv/dt. In this paper, the traditional gate turn-off delay-time control is first used as an example to analyze the limitation of the existing active voltage balancing (AVB) control methods under AC load current: 1) AVB control has a limitation to adjust delay time accurately under AC current; 2) the voltage imbalance of the body diodes cannot be solved by AVB control. To achieve voltage balancing control of series-connected SiC MOSFETs and body diodes, this paper proposes a new two-part hybrid approach: 1) passive dv/dt compensation: one small compensation capacitor is applied to balance the non-uniform distribution of parasitic capacitors inside the power module, so the series-connected MOSFETs can have the same turn-off dv/dt; 2) active gate signal turn-off time adjustment: a closed-loop delay time control is applied to compensate the gate signal mismatch of MOSFETs. To verify the proposed balancing approach, a single-phase pump-back test is conducted to show the improvement of voltage sharing of both MOSFETs and body diodes. 

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5. Electrochemical Battery State Estimation Under Parameter Uncertainty Caused by Aging Using Expansion Measurements

   https://doi.org/10.23919/ACC50511.2021.9482886  

   Pannala, Sravan; Valecha, Puneet; Mohtat, Peyman; Siegel, Jason B.; Stefanopoulou, Anna G. (May 2021, 2021 American Control Conference)

   null (Ed.)

   Accurate tracking of the internal electrochemical states of lithium-ion battery during cycling enables advanced battery management systems to operate the battery safely and maintain high performance while minimizing battery degradation. To this end, techniques based on voltage measurement have shown promise for estimating the lithium surface concentration of active material particles, which is an important state for avoiding aging mechanisms such as lithium plating. However, methods relying on voltage often lead to large estimation errors when the model parameters change during aging. In this paper, we utilize the in-situ measurement of the battery expansion to augment the voltage and develop an observer to estimate the lithium surface concentration distribution in each electrode particle. We demonstrate that the addition of the expansion signal enables us to correct the negative electrode concentration states in addition to the positive electrode. As a result, compared to a voltage only observer, the proposed observer can successfully recover the surface concentration when the electrodes' stoichiometric window changes, which is a common occurrence under aging by loss of lithium inventory. With a 5% shift in the electrodes' stoichiometric window, the results indicate a reduction in state estimation error for the negative electrode surface concentration. Under this simulated aged condition, the voltage based observer had 9.3% error as compared to the proposed voltage and expansion observer which had 0.1% error in negative electrode surface concentration. 

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