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The Computer Science for All movement is bringing CS to K-12 classrooms across the nation. At the same time, new technologies created by computer scientists have been reproducing existing inequities that directly impact today's youth, while being “promoted and perceived as more objective or progressive than the discriminatory systems of a previous era” [1, p. 5–6]. Current efforts are being made to expose students to the social impact and ethics of computing at both the K-12 and university-level—which we refer to as “socially responsible computing” (SRC) in this paper. Yet there is a lack of research describing what such SRC teaching and learning actively involve and look like, particularly in K-12 classrooms. This paper fills this gap with findings from a research-practice partnership, through a qualitative study in an Advanced Placement Computer Science Principles classroom enrolling low-income Latino/a/x students from a large urban community. The findings illustrate 1) details of teaching practice and student learning during discussions about SRC; 2) the impact these SRC experiences have on student engagement with CS; 3) a teacher's reflections on key considerations for effective SRC pedagogy; and 4) why students’ perspectives and agency must be centered through SRC in computing education.
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Experimental Insights from the Rogues Gallery
The Rogues Gallery is a new deployment for understanding next-generation hardware with a focus on unorthodox and uncommon technologies. This testbed project was initiated in 2017 in response to Rebooting Computing efforts and initiatives. The Gallery's focus is to acquire new and unique hardware (the rogues) from vendors, research labs, and start-ups and to make this hardware widely available to students, faculty, and industry collaborators within a managed data center environment. By exposing students and researchers to this set of unique hardware, we hope to foster cross-cutting discussions about hardware designs that will drive future performance improvements in computing long after the Moore's Law era of cheap transistors ends. We have defined an initial vision of the infrastructure and driving engineering challenges for such a testbed in a separate document, so here we present highlights of the first one to two years of post-Moore era research with the Rogues Gallery and give an indication of where we see future growth for this testbed and related efforts.
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- Award ID(s):
- 1822919
- PAR ID:
- 10199642
- Date Published:
- Journal Name:
- IEEE International Conference on Rebooting Computing (ICRC 2020)
- Page Range / eLocation ID:
- 1 to 8
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Conference Paper:
- https://doi.org/10.1109/ICRC.2019.8914707
