skip to main content
US FlagAn official website of the United States government
dot gov icon
Official websites use .gov
A .gov website belongs to an official government organization in the United States.
https lock icon
Secure .gov websites use HTTPS
A lock ( lock ) or https:// means you've safely connected to the .gov website. Share sensitive information only on official, secure websites.

Explore Research Products in the PAR
It may take a few hours for recently added research products to appear in PAR search results.


Title: Design and Implementation of a Neural Network Based Predistorter for Enhanced Mobile Broadband
Digital predistortion is the process of using digital signal processing to correct nonlinearities caused by the analog RF front-end of a wireless transmitter. These nonlinearities contribute to adjacent channel leakage, degrade the error vector magnitude of transmitted signals, and often force the transmitter to reduce its transmission power into a more linear but less power-efficient region of the device. Most predistortion techniques are based on polynomial models with an indirect learning architecture which have been shown to be overly sensitive to noise. In this work, we use neural network based predistortion with a novel neural network training method that avoids the indirect learning architecture and that shows significant improvements in both the adjacent channel leakage ratio and error vector magnitude. Moreover, we show that, by using a neural network based predistorter, we are able to achieve a 42% reduction in latency and 9.6% increase in throughput on an FPGA accelerator with 15% fewer multiplications per sample when compared to a similarly performing memory-polynomial implementation.  more » « less
Award ID(s):
1717218
PAR ID:
10202729
Author(s) / Creator(s):
; ;
Date Published:
Journal Name:
2019 IEEE International Workshop on Signal Processing Systems (SiPS)
Page Range / eLocation ID:
296 to 301
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
More Like this
  1. ; ; ; (, 2019 IEEE 53rd Asilomar Conference on Signals, Systems and Computers)
    null (Ed.)
    We demonstrate digital predistortion (DPD) using a novel, neural-network (NN) method to combat the nonlinearities in power amplifiers (PAs), which limit the power efficiency of mobile devices, increase the error vector magnitude, and cause inadequate spectral containment. DPD is commonly done with polynomial-based methods that use an indirect-learning architecture (ILA) which can be computationally intensive, especially for mobile devices, and overly sensitive to noise. Our approach using NNs avoids the problems associated with ILAs by first training a NN to model the PA then training a predistorter by backpropagating through the PA NN model. The NN DPD effectively learns the unique PA distortions, which may not easily fit a polynomial-based model, and hence may offer a favorable tradeoff between computation overhead and DPD performance. We demonstrate the performance of our NN method using two different power amplifier systems and investigate the complexity tradeoffs. 
    more » « less
  2. ; ; ; (, 2021 55th Asilomar Conference on Signals, Systems, and Computers)
    The nonlinearities of power amplifiers in massive MIMO arrays introduce unwanted spectral regrowth, which is typically avoided via digital predistortion at each amplifier. However, as the number of base station antennas scales up, so does the computational burden of per-antenna linearization. This work introduces a neural-network virtual digital predistortion (vDPD) scheme that operates before the linear precoder for OFDM-based massive MU-MIMO systems. By applying predistortion before the precoder, complexity scales primarily with the number of users. We can achieve comparable linearization along the user beams by training our neural network based on the memory polynomial, predistortion-per-antenna approach. We verify our algorithm through an exhaustive simulator that includes high-order amplifier nonlinearities, memory effects, and variance across the amplifier models. 
    more » « less
  3. ; ; ; ; (, IEEE International Conference on Communications)
    The primary source of nonlinear distortion in wireless transmitters is the power amplifier (PA). Conventional digital predistortion (DPD) schemes use high-order polynomials to accurately approximate and compensate for the nonlinearity of the PA. This is not practical for scaling to tens or hundreds of PAs in massive multiple-input multiple-output (MIMO) systems. There is more than one candidate precoding matrix in a massive MIMO system because of the excess degrees-of-freedom (DoFs), and each precoding matrix requires a different DPD polynomial order to compensate for the PA nonlinearity. This paper proposes a low-order DPD method achieved by exploiting massive DoFs of next-generation front ends. We propose a novel indirect learning structure which adapts the channel and PA distortion iteratively by cascading adaptive zero forcing precoding and DPD. Our solution uses a 3rd order polynomial to achieve the same performance as the conventional DPD using an 11th order polynomial for a 10010 massive MIMO configuration. Experimental results show a 70% reduction in computational complexity, enabling ultra-low latency communications. 
    more » « less
  4. ; (, IEEE Custom Integrated Circuits Conference (CICC))
    null (Ed.)
    Adaptive communication for Internet of Things (IoT) and Wireless Body Area Network (WBAN) technologies is becoming increasingly popular due to the large power-performance trade-offs and highly dynamic channel conditions. Path loss, low signal to noise ratio (SNR) in the channel and network congestion adversely affect the data communication, each of which can be taken care of using different strategies such as reducing the data rate (for reducing congestion), increasing the output power (for increased path loss) and application of error correction coding (ECC, for low SNR). In this paper, we present a digital-friendly Transceiver SoC consisting of an RF-DAC based transmitter with orthogonally tunable output power, data rate and ECC that enables optimum system level bit error rate (BER) and energy for over 3-orders of energy-performance scalability, along with an ultra-low-power OOK receiver that receives the transmitter's control bits from a nearby base station for closed-loop control. The data rate and ECC control is achieved through a digital baseband, while a tapped capacitor matching network controls the output power. The energy efficiency of the transmitter is 27.6pJ/b at 10MSps and at 0.8V supply (~9X improvement over state-of-the-art), while the entire SoC (Transmitter+OOK receiver for controller feedback) consumes only 41.5pJ/b. 
    more » « less
  5. ; (, Proceedings IEEE International Symposium on Circuits and Systems)
    In this paper, a monotonic power side-channel attack (PSA) is proposed to analyze the security vulnerabilities of flash analog-to-digital converters (ADC), where the digital output of a flash ADC is determined by characterizing the monotonic relationship between the traces of the power consumed and the applied input signals. A novel technique that leverages clock phase division is proposed to secure the power side channel information of a 4-bit flash ADC. The proposed technique adds randomness to decorrelate the input signal from the given power trace as the execution phase of each comparator depends on a thermometer code computed from the previous seven clock cycles. The monotonic PSA is executed on both a secured and unsecured ADC, with results indicating 1.9 bits of information leakage from an unprotected ADC and no data leakage from a protected ADC as the bit-wise accuracy is approximately 50% when secured. The monotonic PSA is more effective at attacking a flash ADC architecture than either a convolutional neural network based PSA or a correlation template PSA. The secured ADC core occupies approximately 2% more area than a non-secure ADC in a 65 nm process, and provides a sampling frequency of up to 500 MHz at a supply voltage of 1.2 V. Index Terms—power side-channel, ADC, 
    more » « less
  • Citation Formats
  • MLA
  • APA
  • Chicago
  • BibTeX
  • Save / Share this Record
  • Send to Email