Atomically thin, 2D, and semiconducting transition metal dichalcogenides (TMDs) are seen as potential candidates for complementary metal oxide semiconductor (CMOS) technology in future nodes. While high‐performance field effect transistors (FETs), logic gates, and integrated circuits (ICs) made from n‐type TMDs such as MoS2and WS2grown at wafer scale have been demonstrated, realizing CMOS electronics necessitates integration of large area p‐type semiconductors. Furthermore, the physical separation of memory and logic is a bottleneck of the existing CMOS technology and must be overcome to reduce the energy burden for computation. In this article, the existing limitations are overcome and for the first time, a heterogeneous integration of large area grown n‐type MoS2and p‐type vanadium doped WSe2FETs with non‐volatile and analog memory storage capabilities to achieve a non–von Neumann 2D CMOS platform is introduced. This manufacturing process flow allows for precise positioning of n‐type and p‐type FETs, which is critical for any IC development. Inverters and a simplified 2‐input‐1‐output multiplexers and neuromorphic computing primitives such as Gaussian, sigmoid, and tanh activation functions using this non–von Neumann 2D CMOS platform are also demonstrated. This demonstration shows the feasibility of heterogeneous integration of wafer scale 2D materials.
Here we benchmark device-to-device variation in field-effect transistors (FETs) based on monolayer MoS2and WS2films grown using metal-organic chemical vapor deposition process. Our study involves 230 MoS2FETs and 160 WS2FETs with channel lengths ranging from 5 μm down to 100 nm. We use statistical measures to evaluate key FET performance indicators for benchmarking these two-dimensional (2D) transition metal dichalcogenide (TMD) monolayers against existing literature as well as ultra-thin body Si FETs. Our results show consistent performance of 2D FETs across 1 × 1 cm2chips owing to high quality and uniform growth of these TMDs followed by clean transfer onto device substrates. We are able to demonstrate record high carrier mobility of 33 cm2 V−1 s−1in WS2FETs, which is a 1.5X improvement compared to the best reported in the literature. Our experimental demonstrations confirm the technological viability of 2D FETs in future integrated circuits.
more » « less- NSF-PAR ID:
- 10211804
- Publisher / Repository:
- Nature Publishing Group
- Date Published:
- Journal Name:
- Nature Communications
- Volume:
- 12
- Issue:
- 1
- ISSN:
- 2041-1723
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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The 2D van der Waals crystals have shown great promise as potential future electronic materials due to their atomically thin and smooth nature, highly tailorable electronic structure, and mass production compatibility through chemical synthesis. Electronic devices, such as field effect transistors (FETs), from these materials require patterning and fabrication into desired structures. Specifically, the scale up and future development of “2D”-based electronics will inevitably require large numbers of fabrication steps in the patterning of 2D semiconductors, such as transition metal dichalcogenides (TMDs). This is currently carried out via multiple steps of lithography, etching, and transfer. As 2D devices become more complex (e.g., numerous 2D materials, more layers, specific shapes, etc.), the patterning steps can become economically costly and time consuming. Here, we developed a method to directly synthesize a 2D semiconductor, monolayer molybdenum disulfide (MoS2), in arbitrary patterns on insulating SiO2/Si via seed-promoted chemical vapor deposition (CVD) and substrate engineering. This method shows the potential of using the prepatterned substrates as a master template for the repeated growth of monolayer MoS2patterns. Our technique currently produces arbitrary monolayer MoS2patterns at a spatial resolution of 2 μm with excellent homogeneity and transistor performance (room temperature electron mobility of 30 cm2V−1s−1and on–off current ratio of 107). Extending this patterning method to other 2D materials can provide a facile method for the repeatable direct synthesis of 2D materials for future electronics and optoelectronics.
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° C in 15 min on sapphire wafers. Furthermore, a large area transfer of the synthesized thin films to SiO2/Si substrates is achieved. Following this, MoS2and WS2memristors are fabricated that exhibit stable non‐volatile switching and a satisfactory large on/off current ratio (103–105) with good uniformity. Tuning the sulfurization parameters (temperature and metal precursor thickness) is found to be a straightforward and effective strategy to improve the performance of the memristors. The demonstration of large‐scale MoS2and WS2memristors with a one‐step low‐temperature sulfurization method with simple strategy to tuning can lead to potential applications such as flexible memory and neuromorphic computing. -
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Abstract The large‐area synthesis of high‐quality MoS2plays an important role in realizing industrial applications of optoelectronics, nanoelectronics, and flexible devices. However, current techniques for chemical vapor deposition (CVD)‐grown MoS2require a high synthetic temperature and a transfer process, which limits its utilization in device fabrications. Here, the direct synthesis of high‐quality monolayer MoS2with the domain size up to 120 µm by metal‐organic CVD (MOCVD) at a temperature of 320 °C is reported. Owing to the low‐substrate temperature, the MOCVD‐grown MoS2exhibits low impurity doping and nearly unstrained properties on the growth substrate, demonstrating enhanced electronic performance with high electron mobility of 68.3 cm2V−1s−1at room temperature. In addition, by tuning the precursor ratio, a better understanding of the MoS2growth process via a geometric model of the MoS2flake shape, is developed, which can provide further guidance for the synthesis of 2D materials.
