Ferroelectric tunneling junctions (FTJs) with tunable tunneling electroresistance (TER) are promising for many emerging applications, including non-volatile memories and neurosynaptic computing. One of the key challenges in FTJs is the balance between the polarization value and the tunneling current. In order to achieve a sizable on-current, the thickness of the ferroelectric layer needs to be scaled down below 5 nm. However, the polarization in these ultra-thin ferroelectric layers is very small, which leads to a low tunneling electroresistance (TER) ratio. In this paper, we propose and demonstrate a new type of FTJ based on metal/Al2O3/Zr-doped HfO2/Si structure. The interfacial Al2O3layer and silicon substrate enable sizable TERs even when the thickness of Zr-doped HfO2(HZO) is above 10 nm. We found that F-N tunneling dominates at read voltages and that the polarization switching in HZO can alter the effective tunneling barrier height and tune the tunneling resistance. The FTJ synapses based on Al2O3/HZO stacks show symmetric potentiation/depression characteristics and widely tunable conductance. We also show that spike-timing-dependent plasticity (STDP) can be harnessed from HZO based FTJs. These novel FTJs will have high potential in non-volatile memories and neural network applications.
Continuous device downsizing and circuit complexity have motivated atomic-scale tuning of memristors. Herein, we report atomically tunable Pd/M1/M2/Al ultrathin (<2.5 nm M1/M2 bilayer oxide thickness) memristors using in vacuo atomic layer deposition by controlled insertion of MgO atomic layers into pristine Al2O3atomic layer stacks guided by theory predicted Fermi energy lowering leading to a higher high state resistance (HRS) and a reduction of oxygen vacancy formation energy. Excitingly, memristors with HRS and on/off ratio increasing exponentially with M1/M2 thickness in the range 1.2–2.4 nm have been obtained, illustrating tunneling mechanism and tunable on/off ratio in the range of 10–104. Further dynamic tunability of on/off ratio by electric field is possible by designing of the atomic M2 layer and M1/M2 interface. This result probes ways in the design of memristors with atomically tunable performance parameters.
- Publication Date:
- NSF-PAR ID:
- 10377043
- Journal Name:
- Communications Physics
- Volume:
- 5
- Issue:
- 1
- ISSN:
- 2399-3650
- Publisher:
- Nature Publishing Group
- Sponsoring Org:
- National Science Foundation
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Abstract -
The major focus of artificial intelligence (AI) research is made on biomimetic synaptic processes that are mimicked by functional memory devices in the computer industry [1]. It is urgent to find a memory technology for suiting with Brain-Inspired Computing to break the von Neumann bottleneck which limits the efficiency of conventional computer architectures [2]. Silicon-based flash memory, which currently dominates the market for data storage devices, is facing challenging issues to meet the needs of future data storage device development due to the limitations, such as high-power consumption, high operation voltage, and low retention capacity [1]. The emerging resistive random-access memory (RRAM) has elicited intense research as its simple sandwiched structure, including top electrode (TE) layer, bottom electrode (BE) layer, and an intermediate resistive switching (RS) layer, can store data using RS phenomenon between the high resistance state (HRS) and the low resistance state (LRS). This class of emerging devices is expected to outperform conventional memory devices [3]. Specifically, the advantages of RRAM include low-voltage operation, short programming time, great cyclic stability, and good scalability [4]. Among the materials for RS layer, indium gallium zinc oxide (IGZO) has attracted attention because of its abundance and high atomic diffusion property ofmore »
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The traditional von Neumann architecture limits the increase in computing efficiency and results in massive power consumption in modern computers due to the separation of storage and processing units. The novel neuromorphic computation system, an in-memory computing architecture with low power consumption, is aimed to break the bottleneck and meet the needs of the next generation of artificial intelligence (AI) systems. Thus, it is urgent to find a memory technology to implement the neuromorphic computing nanosystem. Nowadays, the silicon-based flash memory dominates non-volatile memory market, however, it is facing challenging issues to achieve the requirements of future data storage device development due to the drawbacks, such as scaling issue, relatively slow operation speed, and high voltage for program/erase operations. The emerging resistive random-access memory (RRAM) has prompted extensive research as its simple two-terminal structure, including top electrode (TE) layer, bottom electrode (BE) layer, and an intermediate resistive switching (RS) layer. It can utilize a temporary and reversible dielectric breakdown to cause the RS phenomenon between the high resistance state (HRS) and the low resistance state (LRS). RRAM is expected to outperform conventional memory device with the advantages, notably its low-voltage operation, short programming time, great cyclic stability, and good scalability.more »
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Here, in ionically conducting Na 0.5 Bi 0.5 TiO 3 (NBT), we explore the link between growth parameters, stoichiometry and resistive switching behavior and show NBT to be a highly tunable system. We show that the combination of oxygen ionic vacancies and low-level electronic conduction is important for controlling Schottky barrier interfacial switching. We achieve a large ON/OFF ratio for high resistance/low resistance ( R HRS / R LRS ), enabled by an almost constant R HRS of ∼10 9 Ω, and composition-tunable R LRS value modulated by growth temperature. R HRS / R LRS ratios of up to 10 4 and pronounced resistive switching at low voltages (SET voltage of <1.2 V without high-voltage electroforming), strong endurance (no change in resistance states after several 10 3 cycles), uniformity, stable switching and fast switching speed are achieved. Of particular interest is that the best performance is achieved at the lowest growth temperature studied (600 °C), which is opposite to the case of most other perovskite oxides for memristors, where higher growth temperatures are required for optimum performance. This is understood based on the oxygen vacancy control of interfacial switching in NBT, whereas a range of other mechanisms (including filamentary switching)more »
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Biomimetic synaptic processes, which are imitated by functional memory devices in the computer industry, are a key focus of artificial intelligence (AI) research. It is critical to developing a memory technology that is compatible with Brain-Inspired Computing in order to eliminate the von Neumann bottleneck that restricts the efficiency of traditional computer designs. Due to restrictions such as high operation voltage, poor retention capacity, and high power consumption, silicon-based flash memory, which presently dominates the data storage devices market, is having difficulty meeting the requirements of future data storage device development. The developing resistive random-access memory (RRAM) has sparked intense investigation because of its simple two-terminal structure: two electrodes and a switching layer. RRAM has a resistive switching phenomenon which is a cycling behavior between the high resistance state and the low resistance state. This developing device type is projected to outperform traditional memory devices. Indium gallium zinc oxide (IGZO) has attracted great attention for the RRAM switching layer because of its high transparency and high atomic diffusion property of oxygen atoms. More importantly, by controlling the oxygen ratio in the sputter gas, its electrical properties can be easily tuned. The IGZO has been applied to the thin-film transistor (TFT),more »