skip to main content


The NSF Public Access Repository (NSF-PAR) system and access will be unavailable from 5:00 PM ET until 11:00 PM ET on Friday, June 21 due to maintenance. We apologize for the inconvenience.

Title: β -Ga 2 O 3 FinFETs with ultra-low hysteresis by plasma-free metal-assisted chemical etching
In this work, β-Ga 2 O 3 fin field-effect transistors (FinFETs) with metalorganic chemical vapor deposition grown epitaxial Si-doped channel layer on (010) semi-insulating β-Ga 2 O 3 substrates are demonstrated. β-Ga 2 O 3 fin channels with smooth sidewalls are produced by the plasma-free metal-assisted chemical etching (MacEtch) method. A specific on-resistance (R on,sp ) of 6.5 mΩ·cm 2 and a 370 V breakdown voltage are achieved. In addition, these MacEtch-formed FinFETs demonstrate DC transfer characteristics with near zero (9.7 mV) hysteresis. The effect of channel orientation on threshold voltage, subthreshold swing, hysteresis, and breakdown voltages is also characterized. The FinFET with channel perpendicular to the [102] direction is found to exhibit the lowest subthreshold swing and hysteresis.  more » « less
Award ID(s):
1809946 1810041
Author(s) / Creator(s):
; ; ; ; ; ; ; ; ; ;
Date Published:
Journal Name:
Applied Physics Letters
Page Range / eLocation ID:
Medium: X
Sponsoring Org:
National Science Foundation
More Like this
  1. Understanding the thermal stability and degradation mechanism of β-Ga2O3 metal-oxide-semiconductor field-effect transistors (MOSFETs) is crucial for their high-power electronics applications. This work examines the high temperature performance of the junctionless lateral β-Ga2O3 FinFET grown on a native β-Ga2O3 substrate, fabricated by metal-assisted chemical etching with Al2O3 gate oxide and Ti/Au gate metal. The thermal exposure effect on threshold voltage (Vth), subthreshold swing (SS), hysteresis, and specific on-resistance (Ron,sp), as a function of temperature up to 298 °C, is measured and analyzed. SS and Ron,sp increased with increasing temperatures, similar to the planar MOSFETs, while a more severe negative shift of Vth was observed for the high aspect-ratio FinFETs here. Despite employing a much thicker epilayer (∼2 μm) for the channel, the high temperature performance of Ion/Ioff ratios and SS of the FinFET in this work remains comparable to that of the planar β-Ga2O3 MOSFETs reported using epilayers ∼10–30× thinner. This work paves the way for further investigation into the stability and promise of β-Ga2O3 FinFETs compared to their planar counterparts. 
    more » « less
  2. In this paper, the short circuit ruggedness of Gallium Oxide (Ga 2 O 3 ) vertical FinFET is studied using Technology Computer-Aided-Design (TCAD) simulations. Ga 2 O 3 is an emerging ultra-wide bandgap material and Ga 2 O 3 vertical FinFET can achieve the normally-off operation for high voltage applications. Ga 2 O 3 has a relatively low thermal conductivity and, thus, it is critical to explore the design space of Ga 2 O 3 vertical FinFETs to achieve an acceptable short-circuit capability for power applications. In this study, appropriate TCAD models and parameters calibrated to experimental data are used. For the first time, the breakdown voltage simulation accuracy of Ga 2 O 3 vertical FinFETs is studied systematically. It is found that a background carrier generation rate between 10 5 cm −3 s −1 and 10 12 cm −3 s −1 is required in simulation to obtain correct results. The calibrated and robust setup is then used to study the short circuit withstand time (SCWT) of an 800 V-rated Ga 2 O 3 vertical FinFET with different inter-fin architectures. It is found that, due to the high thermal resistance in Ga 2 O 3 , to achieve an SCWT >1 μ s, low gate overdrive is needed which increases R on,sp by 66% and that Ga 2 O 3 might melt before the occurrence of thermal runaway. These results provide important guidance for developing rugged Ga 2 O 3 power transistors. 
    more » « less
  3. High crystalline quality thick β-Ga2O3drift layers are essential for multi-kV vertical power devices. Low-pressure chemical vapor deposition (LPCVD) is suitable for achieving high growth rates. This paper presents a systematic study of the Schottky barrier diodes fabricated on four different Si-doped homoepitaxial β-Ga2O3thin films grown on Sn-doped (010) and (001) β-Ga2O3substrates by LPCVD with a fast growth rate varying from 13 to 21  μm/h. A higher temperature growth results in the highest reported growth rate to date. Room temperature current density–voltage data for different Schottky diodes are presented, and diode characteristics, such as ideality factor, barrier height, specific on-resistance, and breakdown voltage are studied. Temperature dependence (25–250 °C) of the ideality factor, barrier height, and specific on-resistance is also analyzed from the J–V–T characteristics of the fabricated Schottky diodes.

    more » « less
  4. Vertical heterojunction NiO/β n-Ga 2 O/n + Ga 2 O 3 rectifiers employing NiO layer extension beyond the rectifying contact for edge termination exhibit breakdown voltages (V B ) up to 4.7 kV with a power figure-of-merits, V B 2 /R ON of 2 GW·cm −2 , where R ON is the on-state resistance (11.3 mΩ cm 2 ). Conventional rectifiers fabricated on the same wafers without NiO showed V B values of 840 V and a power figure-of-merit of 0.11 GW cm −2 . Optimization of the design of the two-layer NiO doping and thickness and also the extension beyond the rectifying contact by TCAD showed that the peak electric field at the edge of the rectifying contact could be significantly reduced. The leakage current density before breakdown was 144 mA/cm 2 , the forward current density was 0.8 kA/cm 2 at 12 V, and the turn-on voltage was in the range of 2.2–2.4 V compared to 0.8 V without NiO. Transmission electron microscopy showed sharp interfaces between NiO and epitaxial Ga 2 O 3 and a small amount of disorder from the sputtering process. 
    more » « less
  5. Abstract

    High quality dielectric‐semiconductor interfaces are critical for reliable high‐performance transistors. This paper reports the in situ metal–organic chemical vapor deposition of Al2O3on β‐Ga2O3as a potentially better alternative to the most commonly used atomic layer deposition (ALD). The growth of Al2O3is performed in the same reactor as Ga2O3using trimethylaluminum and O2as precursors without breaking the vacuum at a growth temperature of 600 °C. The fast and slow near interface traps at the Al2O3/β‐Ga2O3interface are identified and quantified using stressed capacitance–voltage (CV) measurements on metal oxide semiconductor capacitor (MOSCAP) structures. The density of shallow and deep level initially filled traps (Dit) are measured using ultraviolet‐assisted CV technique. The average Ditfor the MOSCAP is determined to be 6.4×1011cm−2eV−1. The conduction band offset of the Al2O3/ Ga2O3interface is also determined from CV measurements and found out to be 1.7 eV which is in close agreement with the existing literature reports of ALD Al2O3/Ga2O3interface. The current–voltage characteristics are also analyzed and the average breakdown field is extracted to be approximately 5.8 MV cm−1. This in situ Al2O3dielectric on β‐Ga2O3with improved dielectric properties can enable Ga2O3‐based high‐performance devices.

    more » « less