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Title: Improving the Robustness and Efficiency of PIM-Based Architecture by SW/HW Co-Design
Processing-in-memory (PIM) based architecture shows great potential to process several emerging artificial intelligence workloads, including vision and language models. Cross-layer optimizations could bridge the gap between computing density and the available resources by reducing the computation and memory cost of the model and improving the model’s robustness against non-ideal hardware effects. We first introduce several hardware-aware training methods to improve the model robustness to the PIM device’s nonideal effects, including stuck-at-fault, process variation, and thermal noise. Then, we further demonstrate a software/hardware (SW/HW) co-design methodology to efficiently process the state-of-the-art attention-based model on PIM-based architecture by performing sparsity exploration for the attention-based model and circuit architecture co-design to support the sparse processing.  more » « less
Award ID(s):
1955246 2112562
Author(s) / Creator(s):
; ; ;
Date Published:
Journal Name:
2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC)
Page Range / eLocation ID:
618 to 623
Medium: X
Sponsoring Org:
National Science Foundation
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