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1. Rapid Inverse Design of GaN-on-GaN Diode with Guard Ring Termination for BV and (V _F Q) ⁻¹ Co-Optimization

   https://doi.org/10.1109/ISPSD57135.2023.10147511  

   Yee, Nathan; Lu, Albert; Wang, Yifan; Porter, Matthew; Zhang, Yuhao; Wong, Hiu Yung (May 2023, 2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD))

   GaN-on-GaN vertical diode is a promising device for next-generation power electronics. Its breakdown voltage (BV) is limited by edge termination designs such as guard rings. The design space of guard rings is huge and it is difficult to optimize manually. In this paper, we propose an effective inverse design strategy to co-optimize BV and (V F Q) −1 , where BV, V F , and Q are the breakdown voltage, forward voltage, and reserve capacitive charge of the diode, respectively. Using rapid Technology Computer-Aided-Design (TCAD) simulations, neural network (NN), and Pareto front generation, a GaN-on-GaN diode is optimized within 24 hours. We can obtain structures with 200V higher BV at medium (V F Q) −1 or find a nearly ideal BV structure with 25% higher BV 2 /R on compared to the best randomly generated TCAD data. 

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2. Schottky contacts to N-polar GaN with SiN interlayer for elevated temperature operation

   https://doi.org/10.1063/5.0083588  

   Khachariya, Dolar; Szymanski, Dennis; Reddy, Pramod; Kohn, Erhard; Sitar, Zlatko; Collazo, Ramón; Pavlidis, Spyridon (April 2022, Applied Physics Letters)

   In this Letter, we unveil the high-temperature limits of N-polar GaN Schottky contacts enhanced by a low-pressure chemical vapor deposited (LPCVD) SiN interlayer. Compared to conventional Schottky diodes, the insertion of a 5 nm SiN lossy dielectric interlayer in-between Ni and N-polar GaN increases the turn-on voltage ( V ON ) from 0.4 to 0.9 V and the barrier height ( ϕ B ) from 0.4 to 0.8 eV. This modification also reduces the leakage current at zero bias significantly: at room temperature, the leakage current in the conventional Schottky diode is >10 3 larger than that observed in the device with the SiN interlayer, while at 200 °C, this ratio increases to 10 5 . Thus, the rectification ratio (I ON /I OFF ) at ±1.5 V reduces to less than one at 250 °C for the conventional Schottky diode, whereas for SiN-coated diodes, rectification continues until 500 °C. The I–V characteristics of the diode with an SiN interlayer can be recovered after exposure to 400 °C or lower. Contact degradation occurs at 500 °C, although devices are not destroyed yet. Here, we report N-polar GaN Schottky contact operation up to 500 °C using an LPCVD SiN interlayer. 

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3. Silicon implantation and annealing in β -Ga2O3: Role of ambient, temperature, and time

   https://doi.org/10.1063/5.0184946  

   Gann, Katie_R; Pieczulewski, Naomi; Gorsak, Cameron_A; Heinselman, Karen; Asel, Thaddeus_J; Noesges, Brenton_A; Smith, Kathleen_T; Dryden, Daniel_M; Xing, Huili_Grace; Nair, Hari_P; et al (January 2024, Journal of Applied Physics)

   Optimizing thermal anneals of Si-implanted β-Ga2O3 is critical for low resistance contacts and selective area doping. We report the impact of annealing ambient, temperature, and time on the activation of room temperature ion-implanted Si in β-Ga2O3 at concentrations from 5 × 1018 to 1 × 1020 cm−3, demonstrating full activation (>80% activation, mobilities >70 cm2/V s) with contact resistances below 0.29 Ω mm. Homoepitaxial β-Ga2O3 films, grown by plasma-assisted molecular beam epitaxy on Fe-doped (010) substrates, were implanted at multiple energies to yield 100 nm box profiles of 5 × 1018, 5 × 1019, and 1 × 1020 cm−3. Anneals were performed in an ultra-high vacuum-compatible quartz furnace at 1 bar with well-controlled gas compositions. To maintain β-Ga2O3 stability, pO2 must be greater than 10−9 bar. Anneals up to pO2 = 1 bar achieve full activation at 5 × 1018 cm−3, while 5 × 1019 cm−3 must be annealed with pO2 ≤ 10−4 bar, and 1 × 1020 cm−3 requires pO2 < 10−6 bar. Water vapor prevents activation and must be maintained below 10−8 bar. Activation is achieved for anneal temperatures as low as 850 °C with mobility increasing with anneal temperatures up to 1050 °C, though Si diffusion has been reported above 950 °C. At 950 °C, activation is maximized between 5 and 20 min with longer times resulting in decreased carrier activation (over-annealing). This over-annealing is significant for concentrations above 5 × 1019 cm−3 and occurs rapidly at 1 × 1020 cm−3. Rutherford backscattering spectrometry (channeling) suggests that damage recovery is seeded from remnant aligned β-Ga2O3 that remains after implantation; this conclusion is also supported by scanning transmission electron microscopy showing retention of the β-phase with inclusions that resemble the γ-phase. 

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4. 2023 IEEE Energy Conversion Congress and Exposition (ECCE)

   https://doi.org/10.1109/ECCE53617.2023  

   Sayed, Hussain; Krishnamoorthy, Harish (January 2023, IEEE)

   This paper presents an improved on-state resistance (RDSon) measurement scheme for high and low-side GaN FETs, which is critical for reliable and precise assessment of GaN HEMT power devices’ lifetime and degradation patterns. The proposed circuit is based on an active voltage clamp using Si MOSFET and Schottky and Zener diodes. The proposed circuit features lower parasitic inductances and capacitances by replacing the Si MOSFET with e-mode GaN FET. This modification contributed to much lower ringing and spikes in the voltage and current waveform of both the measurement FET and the DUT. The absence of an embedded body diode in the GaN device in the measurement circuit allows zero reverse recovery operation, making it more viable in high-frequency power converters. This study also provides a detailed design analysis of a bootstrap GaN-based on-state voltage (VDSon) sensing scheme for high-side FETs, useful in multiple converter configurations for in-situ devices’ health monitoring and conditioning. Simulation and experimental results validate the performance and features of the proposed concepts. 

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5. Robust avalanche in GaN leading to record performance in avalanche photodiode

   https://doi.org/10.1109/IRPS45951.2020.9129299  

   Ji, Dong; Ercan, Burcu; Benson, Garret; Newaz, AKM; Chowdhury, Srabanti (April 2020, 2020 IEEE International Reliability Physics Symposium (IRPS))

   This abstract presents a study on the avalanche capability of GaN p-i-n diode leading to the achievement of 60A/W, 278V GaN avalanche photodiode. The GaN p-i-n diode fabricated on a free-standing GaN substrate was avalanche capable due to optimal edge termination. Both electrical and optical characterizations were conducted to validate the occurrence of avalanche in these devices. The device showed a positive temperature coefficient of breakdown voltage, which follows the nature of avalanche breakdown. The positive coefficient was measured to be 3.85 ×10^(-4) K^(-1) (0.1V/K) under a measurement temperature ranges from 300 K to 525 K. Moreover, the fabricated device showed excellent performance as an avalanche photo detector with record device metrics: (1) record high photoresponsivity of 60 A/W; (2) high optical gain of 10^5 ; and (3) low cark current. Robust avalanche is a key requirement in various device applications and necessary for their reliable operation. 

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