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Title: DC-biased Suzuki stack circuit for Josephson-CMOS memory applications
Abstract Josephson-CMOS hybrid memory leverages the high speed and low power operation of single-flux quantum logic and the high integration densities of CMOS technology. One of the commonly used type of interface circuits in Josephson-CMOS memory is a Suzuki stack, which is a latching high-voltage driver circuit. Suzuki stack circuits are typically powered by an AC bias voltage that has several limitations such as synchronization and coupling effects. To address these issues, a novel DC-biased Suzuki stack circuit is proposed in this paper. As compared to a conventional AC-biased Suzuki stack circuit, the proposed DC-biased design can provide similar output voltage levels and parameter margins, approximately two times higher operating frequency, and three orders of magnitude lower heat load of bias cables.  more » « less
Award ID(s):
2308863 2124453
PAR ID:
10524635
Author(s) / Creator(s):
; ; ; ;
Publisher / Repository:
IOP Publishing
Date Published:
Journal Name:
Superconductor Science and Technology
Volume:
37
Issue:
8
ISSN:
0953-2048
Format(s):
Medium: X Size: Article No. 085023
Size(s):
Article No. 085023
Sponsoring Org:
National Science Foundation
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