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Integrating PV panels as a source of clean energy has been a widely established method to achieve net-zero energy (NZE) buildings. The exterior envelope of the high-rise buildings can serve as the best place to integrate PV panels for utilizing solar energy. The taller the building, the higher the potential to utilize solar energy by PV panels. However, shadows casting on the BIPV façade systems are unavoidable as they are often subject to partial shades from panels self-shading as well as building walls. Partial shading or ununiform solar radiation on the PV surface causes a dramatic decrease in the current output of the circuit. For that reason, in BIPV facades the default circuit connection of manufactured PV panels does not output maximum power under partial shading conditions. This paper investigates the different circuit connections in BIPV façade system to achieve higher energy yields while addressing design requirements. To this end, PV power production in different circuit connection reconfiguration scenarios was explored in two levels of BIPV components: 1) PV cells, and 2) strings of PV cells. Experimental tests conducted to validate the simulation results. The results of this study indicated that the maximum power generation occurred when the circuit connection between cells within a string is series, and the circuit connection between the strings within a PV panel is parallel. Results of the experimental tests shown that the series-parallel circuit connection increases the energy yields of the BIPV facades 71 times in real-world applications. The comparison analysis of the Ladybug energy simulations and the proposed analysis Grasshopper analysis recipe power output showed that the developed Grasshopper script will increase the BIPVs energy yields by 90% in simulations.
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This content will become publicly available on January 24, 2026
Abnormality Detection Using Power Rising and Descending Signature (PRIDES)
This paper presents a new paradigm for abnormality detection using a novel power signature that characterizes the rising and descending patterns of energy consumption. The proposed methodology includes a low-overhead power signature generation circuit, computation-light analysis methods, and optimal generation of the golden signature used in the analysis. The proposed power signature generation circuit is designed using 90 nm CMOS technology, and its operation is validated via circuit simulations. The effectiveness of the proposed method in detecting the insertion of potentially malicious code is demonstrated with data obtained from hardware experiments and circuit simulations.
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- Award ID(s):
- 2231623
- PAR ID:
- 10574375
- Publisher / Repository:
- ACM
- Date Published:
- Journal Name:
- ACM Transactions on Embedded Computing Systems
- ISSN:
- 1539-9087
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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