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Abstract A synaptic memristor using 2D ferroelectric junctions is a promising candidate for future neuromorphic computing with ultra‐low power consumption, parallel computing, and adaptive scalable computing technologies. However, its utilization is restricted due to the limited operational voltage memory window and low on/off current (ION/OFF) ratio of the memristor devices. Here, it is demonstrated that synaptic operations of 2D In2Se3ferroelectric junctions in a planar memristor architecture can reach a voltage memory window as high as 16 V (±8 V) and ION/OFFratio of 108, significantly higher than the current literature values. The power consumption is 10−5 W at the on state, demonstrating low power usage while maintaining a large ION/OFFratio of 108compared to other ferroelectric devices. Moreover, the developed ferroelectric junction mimicked synaptic plasticity through pulses in the pre‐synapse. The nonlinearity factors are obtained 1.25 for LTP, −0.25 for LTD, respectively. The single‐layer perceptron (SLP) and convolutional neural network (CNN) on‐chip training results in an accuracy of up to 90%, compared to the 91% in an ideal synapse device. Furthermore, the incorporation of a 3 nm thick SiO2interface between the α‐In2Se3and the Au electrode resulted in ultrahigh performance among other 2D ferroelectric junction devices to date.
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This content will become publicly available on August 30, 2026
Ferroelectric Memory Technology for Big Data Applications
Big Data has an insatiable appetite for larger and better-performing memory. While current memory technologies continue to advance, the performance gaps in current memory and storage technology have motivated the exploration of emerging memory technologies capable of providing new functionalities. Ferroelectric memory is one such promising candidate which has recently experienced a revival after the discovery of ferroelectricity in hafnium dioxide (HfO2) – the dielectric of choice in advanced CMOS manufacturing. While the commercial viability of ferroelectric memory technology has made significant progress over the past decade, several challenges related to variation and reliability still stand as a barrier to large-scale commercial implementation. Here, we review some of the outstanding challenges of ferroelectric memory technology along with the recent materials and device innovations that are being considered to overcome them. Moreover, we aim to highlight these challenges as materials and device co-design problems that must be addressed through collaborative efforts that straddle the two disciplines. We identify and provide our perspective on some of the key challenges and opportunities for ferroelectric-based microelectronic technology. Ferroelectrics non-volatile memory, in-memory computation
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- PAR ID:
- 10634752
- Publisher / Repository:
- ACM
- Date Published:
- Journal Name:
- ACM Transactions on Embedded Computing Systems
- ISSN:
- 1539-9087
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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