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Title: Enhanced Synaptic Memory Window and Linearity in Planar In 2 Se 3 Ferroelectric Junctions
Abstract A synaptic memristor using 2D ferroelectric junctions is a promising candidate for future neuromorphic computing with ultra‐low power consumption, parallel computing, and adaptive scalable computing technologies. However, its utilization is restricted due to the limited operational voltage memory window and low on/off current (ION/OFF) ratio of the memristor devices. Here, it is demonstrated that synaptic operations of 2D In2Se3ferroelectric junctions in a planar memristor architecture can reach a voltage memory window as high as 16 V (±8 V) and ION/OFFratio of 108, significantly higher than the current literature values. The power consumption is 10−5 W at the on state, demonstrating low power usage while maintaining a large ION/OFFratio of 108compared to other ferroelectric devices. Moreover, the developed ferroelectric junction mimicked synaptic plasticity through pulses in the pre‐synapse. The nonlinearity factors are obtained 1.25 for LTP, −0.25 for LTD, respectively. The single‐layer perceptron (SLP) and convolutional neural network (CNN) on‐chip training results in an accuracy of up to 90%, compared to the 91% in an ideal synapse device. Furthermore, the incorporation of a 3 nm thick SiO2interface between the α‐In2Se3and the Au electrode resulted in ultrahigh performance among other 2D ferroelectric junction devices to date.  more » « less
Award ID(s):
2118806
PAR ID:
10637779
Author(s) / Creator(s):
; ; ; ; ; ; ; ;
Publisher / Repository:
Wiley
Date Published:
Journal Name:
Advanced Materials
Volume:
37
Issue:
6
ISSN:
0935-9648
Page Range / eLocation ID:
2413178
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
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