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  1. ; ; ; ; ; ; ; ; ; ; et al ( , ACM Transactions on Mathematical Software)
    This article describes a standard API for a set of Batched Basic Linear Algebra Subprograms (Batched BLAS or BBLAS). The focus is on many independent BLAS operations on small matrices that are grouped together and processed by a single routine, called a Batched BLAS routine. The matrices are grouped together in uniformly sized groups, with just one group if all the matrices are of equal size. The aim is to provide more efficient, but portable, implementations of algorithms on high-performance many-core platforms. These include multicore and many-core CPU processors, GPUs and coprocessors, and other hardware accelerators with floating-point compute facility.more »As well as the standard types of single and double precision, we also include half and quadruple precision in the standard. In particular, half precision is used in many very large scale applications, such as those associated with machine learning.« less
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  2. ; ; ( , Journal of Parallel and Distributed Computing)
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  3. ; ; ; ( , 2020 IEEE High Performance Extreme Computing Conference (HPEC))
    Dense linear algebra (DLA) has historically been in the vanguard of software that must be adapted first to hardware changes. This is because DLA is both critical to the accuracy and performance of so many different types of applications, and because they have proved to be outstanding vehicles for finding and implementing solutions to the problems that novel architectures pose. Therefore, in this paper we investigate the portability of the MAGMA DLA library to the latest AMD GPUs.We use auto tools to convert the CUDA code in MAGMA to the Heterogeneous-Computing Interface for Portability (HIP) language. MAGMA provides LAPACK formore »GPUs and benchmarks for fundamental DLA routines ranging from BLAS to dense factorizations, linear systems and eigen-problem solvers. We port these routines to HIP and quantify currently achievable performance through the MAGMA benchmarks for the main workload algorithms on MI25 and MI50 AMD GPUs. Comparison with performance roofline models and theoretical expectations are used to identify current limitations and directions for future improvements.« less
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  4. ( , Journal of computational science education)
    Accepted Manuscript Full Text Available
  5. ; ; ; ; ; ( , ISC High Performance)
    Accepted Manuscript Full Text Available
  6. ; ; ( , ISC High Performance)
    Accepted Manuscript Full Text Available
  7. ; ; ( , 33rd IEEE International Parallel and Distributed Processing Symposium (IPDPS))
    Accepted Manuscript Full Text Available
  8. ; ; ; ; ; ; ( , Parallel computing)
    Accepted Manuscript Full Text Available
  9. ; ; ( , IEEE High Performance Extreme Computing Conference (HPEC’18))
    Accepted Manuscript Full Text Available
  10. ; ; ; ; ( , IEEE transactions on parallel and distributed systems)
    We present a high-performance GPU kernel with a substantial speedup over vendor libraries for very small matrix computations. In addition, we discuss most of the challenges that hinder the design of efficient GPU kernels for small matrix algorithms. We propose relevant algorithm analysis to harness the full power of a GPU, and strategies for predicting the performance, before introducing a proper implementation. We develop a theoretical analysis and a methodology for high-performance linear solvers for very small matrices. As test cases, we take the Cholesky and LU factorizations and show how the proposed methodology enables us to achieve a performancemore »close to the theoretical upper bound of the hardware. This work investigates and proposes novel algorithms for designing highly optimized GPU kernels for solving batches of hundreds of thousands of small-size Cholesky and LU factorizations. Our focus on efficient batched Cholesky and batched LU kernels is motivated by the increasing need for these kernels in scientific simulations (e.g., astrophysics applications). Techniques for optimal memory traffic, register blocking, and tunable concurrency are incorporated in our proposed design. The proposed GPU kernels achieve performance speedups versus CUBLAS of up to 6× for the factorizations, using double precision arithmetic on an NVIDIA Pascal P100 GPU.« less
    Accepted Manuscript Full Text Available