An official website of the United States government
This paper presents a step-up DC-DC converter that uses a stepwise gate-drive technique to reduce the power FET gate-drive energy by 82%, allowing positive efficiency down to an input voltage of ±0.5 mV—the lowest input voltage ever achieved for a DC-DC converter as far as we know. Below ±0.5 mV the converter automatically hibernates, reducing quiescent power consumption to just 255 pW. The converter has an efficiency of 63% at ±1 mV and 84% at ±6 mV. The input impedance is programmable from 1 Ω to 600 Ω to achieve maximum power extraction. A novel delay line circuit controls the stepwise gatedrive timing, programmable input impedance, and hibernation behavior. Bipolar input voltage is supported by using a flyback converter topology with two secondary windings. A generated power good signal enables the load when the output voltage has charged above 2.7 V and disables when the output voltage has discharged below 2.5 V. The DC-DC converter was used in a thermoelectric energy harvesting system that effectively harvests energy from small indoor temperature fluctuations of less than 1°C. Also, an analytical model with unprecedented accuracy of the stepwise gate-drive energy is presented.
more »
« less
A 78.2nW 3-Channel Time-Delay-to-Digital Converter using Polarity Coincidence for Audio-based Object Localization
This paper presents an ultra-low-power intersignal time-delay-to-digital converter. It introduces polarity-coincidence adaptive time-delay estimation, a mixed-signal processing technique that consumes only 78.2nW for a 3-channel delay estimation. A 0.18um CMOS implementation of the converter has been tested and characterized with controlled and real-life stimuli. This analog-to-feature converter has further been used to estimate the time difference of arrival in an audio-based vehicle-bearing IoT system.
more »
« less
- Award ID(s):
- 1704899
- PAR ID:
- 10057090
- Date Published:
- Journal Name:
- IEEE Custom Integrated Circuits Conference
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
More Like this
-
-
Due to the rapid development of economies, large urban cities consume an increasing amount of energy and have a higher requirement for power quality. Voltage source converter based high voltage direct current (VSC-HVDC) is a promising device to transmit clean power from remote regions to urban power systems, while also providing wide area damping control (WADC) for frequency stabilization. However, the time-delay naturally existing in the VSC-HVDC system may degrade the performance of WADC and even result in instability. To address this issue, this paper develops a time-delay correction control strategy for VSC-HVDC damping control in urban power grids. First, a small signal model of WADC is built to analyze the negative impacts of time delay. Then, a data-driven approach is proposed to compensate for the inherent time delay in VSC-HVDC damping control. The extensive training data will be generated under various disturbances. After offline training, the long short-term memory network (LSTM) can be implemented online to predict the actual frequency deviation based on real-time measurements. Finally, the proposed method is validated through MATLAB-Simulink in a two-area four-machine system. The results indicate that the data-driven compensation has a strong generalization ability for random delay time constants and can improve the performance of WADC significantly.more » « less
-
ABSTRACT In this paper a parameter estimation method of high frequency switching power converters is proposed. Parameters are estimated through measurement of basic circuit voltage and current quantities and using simple feed forward neural networks to establish correlations between circuit parameter variations and general converter performance. This allows the estimation of internal semiconductor device or passive component parameters that would be challenging to measure directly. This approach serves as a promising enabler for power converter digital twins and for converter health monitoring. The proposed framework is developed and verified for an LLC resonant converter. Parameter predictions achieved mean absolute errors below 4.12% and an average MAE of 1.57% for all parameters.more » « less
-
In this paper, an new converter that includes isolated composite resonant multilevel converter (ICRMC) that uses composite converter concept and partial power voltage regulator (PPVR) has been proposed for telecommunication application. The proposed converter can achieve high efficiency at nominal operating point since it takes minimum effort to regulate the output voltage at this point. A comparative study shows that with the proposed two operation modes of ICRMC, the proposed converter has the best capability to maintain lowest total semiconductor power stress among the existing state of the art solutions when the input voltage varies from 36V to 60V. Furthermore, zero current switching (ZCS) can be always achieved on the switching devices in ICRMC under different operating points. A 600W converter has been simulated to validate the theoretical analysis. The estimated peak efficiency can be as high as 97.65%. Fully debugged prototype and experimental results are provided in this paper.more » « less
-
Broad-scale modeling and optimization play a vital role in the design of advanced power converters. Optimization is normally implemented via brute force iterations of design variables or utilizing metaheuristic techniques which are time consuming for a wide range of potential topologies, device implementations, and operating points. Recently, discrete time state-space modeling has shown merits in rapid analysis and generality to arbitrary circuit topologies but has not yet been utilized under rapid optimization techniques across multiple converter parameters. In this work, we investigate methods to incorporate rapid gradient-based optimization techniques to leverage discrete time state-space modeling and showcase the approach in the power converter design process. The method is validated on a 48-to-1V converter designed using the proposed techniques.more » « less
- Free Publicly Accessible Full Text
-
Accepted Manuscript1.0
- Conference Paper:
- The DOI is not currently available.
