The challenges associated with efficiently and effectively linearizing a nonlinear power amplifier (PA) over wide signal bandwidths are increasingly important to the design of 5G front-ends. Conventional digital linearization techniques are limited by absolute bandwidth, while the RF-domain nonlinear PA typically exhibits consistent fractional bandwidth even as the carrier frequency is increased. Therefore, RF-domain design techniques, like those focusing on bias-line impedance selection, are critical for overall distortion reduction. To evaluate bias-line effects, a demonstrator PA is here investigated over a range of Class-AB biases and over a range of drain inductance values. The characterization under two-tone and LTE-like modulated excitations with 10-MHz and 100-MHz instantaneous bandwidth shows that the conventional linear-efficiency trade-off in bias design does not necessarily hold true for wide instantaneous bandwidths. Additionally, techniques to synthesize a negative baseband impedance using low frequency feedback are discussed.
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A 28GHz 41%-PAE linear CMOS power amplifier using a transformer-based AM-PM distortion-correction technique for 5G phased arrays
To fulfill the insatiable demand for high data-rates, the millimeter-wave (mmW) 5G communication standard will extensively use high-order complex-modulation schemes (e.g., QAM) with high peak-to-average power ratios (PAPRs) and large RF bandwidths. High-efficiency integrated CMOS power amplifiers (PA) are highly desirable for portable devices for improved battery life, reduced form factor, and low cost. To meet simultaneous requirements for high efficiency and reasonable linearity, PAs intended for use with complex modulation are often operated in Class-AB mode [1,2]. For small input amplitude in Class-AB, the device is turned-on and has an input capacitance (Cgs) of ~(2/3)WLCox. As the input amplitude becomes large, the device turns-off for part of the RF cycle, thus reducing its effective input capacitance. This input capacitance-modulation effect creates an input-amplitude-dependent phase shift in Class-AB mode resulting in an amplitude-modulation to phase-modulation (AM-PM) distortion [2]. Consequently, it degrades linearity metrics (e.g., error vector magnitude (EVM), adjacent channel power ratio (ACPR)) in complex-modulation systems. External linearization techniques (e.g., digital pre-distortion) are often used in transmitters to meet linearity requirements, but they are complex in nature and expensive to implement. Apart from these, few works at low-GHz frequencies are reported to improve the PA's intrinsic linearity using a varactor-or PMOS-based AM-PM correction methods [1,2]. These works reduce the design overhead of external linearization systems; however, the inclusion of additional capacitive element to correct AM-PM degrades gain and efficiency, which is not optimal for mmW frequencies
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- Award ID(s):
- 1705026
- NSF-PAR ID:
- 10057546
- Date Published:
- Journal Name:
- 2018 IEEE International Solid - State Circuits Conference - (ISSCC)
- Page Range / eLocation ID:
- 406-408
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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