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We introduce a simple widely applicable formalism for designing “error-divisible” two-qubit gates: a quantum gate set where fractional rotations have proportionally reduced error compared to the full entangling gate. In current noisy intermediate-scale quantum (NISQ) algorithms, performance is largely constrained by error proliferation at high circuit depths, of which two-qubit gate error is generally the dominant contribution. Further, in many hardware implementations, arbitrary two-qubit rotations must be composed from multiple two-qubit stock gates, further increasing error. This work introduces a set of cri- teria, and example wave forms and protocols to satisfy them, using superconducting qubits with tunable couplers for constructing continuous gate sets with significantly reduced leakage and dynamic ZZ errors for small-angle rotations. If implemented at scale, NISQ-algorithm performance could be significantly improved by our error-divisible gate protocols.
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Systematic Crosstalk Mitigation for Superconducting Qubits via Frequency-Aware Compilation
One of the key challenges in current Noisy Intermediate-Scale Quantum (NISQ) computers is to control a quantum system with high-fidelity quantum gates. There are many reasons a quantum gate can go wrong -- for superconducting transmon qubits in particular, one major source of gate error is the unwanted crosstalk between neighboring qubits due to a phenomenon called frequency crowding. We motivate a systematic approach for understanding and mitigating the crosstalk noise when executing near-term quantum programs on superconducting NISQ computers. We present a general software solution to alleviate frequency crowding by systematically tuning qubit frequencies according to input programs, trading parallelism for higher gate fidelity when necessary. The net result is that our work dramatically improves the crosstalk resilience of tunable-qubit, fixed-coupler hardware, matching or surpassing other more complex architectural designs such as tunable-coupler systems. On NISQ benchmarks, we improve worst-case program success rate by 13.3x on average, compared to existing traditional serialization strategies.
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- Award ID(s):
- 1730449
- PAR ID:
- 10209010
- Date Published:
- Journal Name:
- 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
- Page Range / eLocation ID:
- 201 to 214
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
-
Accepted Manuscript
- Conference Paper:
- https://doi.org/10.1109/MICRO50266.2020.00028
