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1. Evaluation of a Medium-Voltage Grid-Tied Cascaded H-Bridge for Energy Storage Systems Using SiC Switching Devices

   https://doi.org/10.1109/eGRID.2018.8598683  

   Mhiesan, Haider ; Farnell, Chris ; McCann, Roy ; Mantooth, Alan ( November 2018 , Evaluation of a Medium-Voltage Grid-Tied Cascaded H-Bridge for Energy Storage Systems Using SiC Switching Devices)

   This paper presents the study and evaluation of a medium-voltage grid-tied cascaded H-bridge (CHB) three-phase inverter for battery energy storage systems using SiC devices as an enabling technology. The high breakdown voltage capability of SiC devices provide the advantage to significantly minimize the complexity of the CHB multilevel converter, with less power loss compared to when Silicon (Si) devices are used. The topology in this study has been selected based on high voltage SiC devices. In order to reach 13.8 kV, a nine-level CHB is needed when using 6.5 kV SiC MOSFETs. However, if 10 kV SiC MOSFETs are used, only five-levels of the CHB are required. The controls were developed, simulated and verified through an experimental prototype. The results from the scaled-down prototype proved the controls and the verification of the performance of five-level CHB three-phase inverter. For the system reliability, both open-loop and short-circuit faults are analyzed. 

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2. Adaptive Distance Protection Based on the Analytical Model of Additional Impedance for Inverter-Interfaced Renewable Power Plants During Asymmetrical Faults

   https://doi.org/10.1109/TPWRD.2021.3138128  

   Chao, Chenxu ; Zheng, Xiaodong ; Weng, Yang ; Liu, Yu ; Gao, Piao ; Nengling, Tai ( December 2021 , IEEE Transactions on Power Delivery)

   Due to limited amplitude and controlled phase of current supplied by inverter-interfaced renewable power plants (IIRPPs), the IIRPP-side distance protection of lines connected to IIRPPs fails to detect the fault location accurately, so it may malfunction. The composite sequence network of a line connected to an IIRPP during asymmetrical faults is analyzed, and an adaptive distance protection based on the analytical model of additional impedance is proposed in this study. Based on open circuit property of negative-sequence network at the IIRPP-side, the equivalent impedance of power grid and current flowing through fault point are calculated in real-time using local measurements, which are substituted into the analytical model of additional impedance to calculate fault location. In the case of negative-sequence reactive current injection from IIRPPs during asymmetrical faults, the error of calculating fault point current from local measurements is analyzed and corrected to ensure reliability of the proposed protection. The proposed protection alleviates the effect of fault resistance in a system with weak sources. In addition, the proposed protection can adapt to different grid codes (GCs), the operation mode change of the power grid, and the capacity change of the IIRPP. PSCAD/EMTDC test results verify the effectiveness of the proposed protection. 

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3. Fast Detection of Open Circuit Device Faults and Fault Tolerant Operation of Stacked Multilevel Converters

   https://doi.org/10.1109/APEC.2019.8721923  

   Hekmati, Parham ; Brown, Ian P. ; Shen, Z. John ( March 2019 , 2019 IEEE Applied Power Electronics Conference and Exposition (APEC))

   This paper proposes a simple and fast technique for power device open circuit (OC) fault detection in stacked multicell converters (SMCs). A mitigation technique allowing for fault-tolerant operation using a simple front-end routing circuit is also proposed for SMCs. The fault detection concept only needs to sense the voltage and direction of current at the output terminal of the SMC to detect and localize an OC switch fault to a particular rail of the SMC. The proposed technique compares the measured and expected voltage levels considering the commanded switch states and the direction of the terminal current flow. Once an OC fault is detected and localized, the front-end routing circuit will be activated to reconfigure the SMC converter to a simple flying capacitor multilevel converter (FCMC) to maintain the output power flow with a reduced number of voltage levels. A window detector circuit is proposed to track the output voltage level and current direction with high bandwidth. Simulations were performed to validate the fault detection method and router performance. The functionality of windows detector is investigated with a hardware prototype 7 level 300 V SMC. 

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4. Short Circuit Fault Discrimination Using SiC JFET Based Self-Powered Solid State Circuit Breakers in a Residential DC Community Microgrid

   https://doi.org/10.1109/TIA.2020.2995114  

   Palaniappan, Karthik ; Sedano, Willy ; Vygoder, Mark ; Hoeft, Nicholas ; Cuzner, Rob ; Shen, John ( May 2020 , IEEE Transactions on Industry Applications)

   This article identifies and validates the use of ultrafast silicon carbide (SiC) junction field effect transistor (JFET)-based self-powered solid-state circuit breakers (SSCBs) as the enabling protective device for a 340 Vdc residential dc community microgrid. These SSCBs will be incorporated into a radial distribution system in order to enhance fault discrimination through autonomous operation. Because of the nature and characteristics of short-circuit fault inception in dc microgrids, the time-current trip characteristics of protective devices must be several orders of magnitude faster than conventional circuit breakers. The proposed SSCBs detect short-circuit faults by sensing the sudden voltage rise between its two power terminals and draw power from the fault condition itself to turn off SiC JFETs and then, coordinate with no-load contacts that can isolate the fault. Depending upon the location of the SSCBs in the microgrid, either unidirectional or bidirectional implementations are incorporated. Cascaded SSCBs are tuned using a simple resistor change to enable fault discrimination between upstream high-current feeds and downstream lower current branches. Operation of one of the SSCBs and three in cascaded arrangements are validated both in simulation and with a hardware test platform. Thermal impact on the SSCB is discussed as well. The target application is a residential dc microgrid that will be installed as part of a revitalization effort of an inner city Milwaukee neighborhood. 

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5. Comparative Analysis of Silicon Carbide and Silicon Switching Devices for Multilevel Cascaded H-Bridge Inverter Application with Battery Energy storage

   https://doi.org/10.1109/PEDG.2018.8447775  

   Mordi, Kenneth ; Mhiesan, Haider ; Umuhoza, Janviere ; Hossain, Md Maksudul ; Farnell, Chris ; Mantooth, H. Alan ( June 2018 , 2018 9th IEEE International Symposium on Power Electronics for Distributed Generation Systems (PEDG))

   This paper investigates the use of power semiconductor devices in a nine - level cascaded H-bridge (CHB) multilevel inverter topology with an integrated battery energy storage system (BESS) for a 13.8kV medium voltage distribution system. In this topology, the bulky conventional step-up 60 Hz transformer is not used. The purpose of this study is to analyze the use of SiC MOSFET and Si IGBT devices in the inverter system to evaluate their respective performances. SiC MOSFET and Si IGBT switching devices are modeled and characterized using Saber® modeling software. The switching losses, thermal performance, and efficiency of the inverter system are investigated, and measurements are obtained from the simulation. Saber® provides a good capability for characterizing semiconductor models in the real world, with great features of computation. A three-phase SiC power MOSFET-based multilevel CHB inverter prototype is presented for experimental verification. In the investigation, better performances of SiC MOSFET devices are recorded. SiC devices demonstrate promising performance at different switching frequency and temperature ranges. 

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