The increasing importance of power electronic converters in supplying electrical energy to utility grids places a higher priority to detect and protect against fault conditions. Fault detection and isolation are particularly important for inverters that provide black-start recovery for microgrids since these converters provide the energy source for restoration after a power outage. This paper presents a new fault detection and location method for Cascaded H-Bridge (CHB) multilevel inverters. The new fault detection method is based on monitoring the output voltage of each cell and output current directions along with each switch’s state. By monitoring each cell’s output voltage and current direction, the faulty cell can be detected and isolated. After the faulty cell is detected, the faulty switch can be located by comparing the current direction with the switching states. This technique is implemented with Level-Shifted Pulse Width Modulation (LS-PWM) in order to maintain acceptable total harmonic distortion (THD) levels at the converter. The proposed method can be implemented for a CHB with any number of cells, can operate with nonlinear loads, and offers very fast detection times. Simulation and experimental results verify the performance of this method.
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Fast Detection of Open Circuit Device Faults and Fault Tolerant Operation of Stacked Multilevel Converters
This paper proposes a simple and fast technique for power device open circuit (OC) fault detection in stacked multicell converters (SMCs). A mitigation technique allowing for fault-tolerant operation using a simple front-end routing circuit is also proposed for SMCs. The fault detection concept only needs to sense the voltage and direction of current at the output terminal of the SMC to detect and localize an OC switch fault to a particular rail of the SMC. The proposed technique compares the measured and expected voltage levels considering the commanded switch states and the direction of the terminal current flow. Once an OC fault is detected and localized, the front-end routing circuit will be activated to reconfigure the SMC converter to a simple flying capacitor multilevel converter (FCMC) to maintain the output power flow with a reduced number of voltage levels. A window detector circuit is proposed to track the output voltage level and current direction with high bandwidth. Simulations were performed to validate the fault detection method and router performance. The functionality of windows detector is investigated with a hardware prototype 7 level 300 V SMC.
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- Award ID(s):
- 1711485
- NSF-PAR ID:
- 10105688
- Date Published:
- Journal Name:
- 2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
- Volume:
- 1
- Issue:
- 1
- Page Range / eLocation ID:
- 1758 to 1765
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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- Free Publicly Accessible Full Text
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Accepted Manuscript1.0
- Conference Paper:
- https://doi.org/10.1109/APEC.2019.8721923
