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Van der Waals (vdW) ferroelectrics have attracted significant attention for their potential in next-generation nano-electronics. Two-dimensional (2D) group-IV monochalcogenides have emerged as a promising candidate due to their strong room temperature in-plane polarization down to a monolayer limit. However, their polarization is strongly coupled with the lattice strain and stacking orders, which impact their electronic properties. Here, we utilize four-dimensional scanning transmission electron microscopy (4D-STEM) to simultaneously probe the in-plane strain and out-of-plane stacking in vdW SnSe. Specifically, we observe large lattice strain up to 4% with a gradient across ~50 nm to compensate lattice mismatch at domain walls, mitigating defects initiation. Additionally, we discover the unusual ferroelectric-to-antiferroelectric domain walls stabilized by vdW force and may lead to anisotropic nonlinear optical responses. Our findings provide a comprehensive understanding of in-plane and out-of-plane structures affecting domain properties in vdW SnSe, laying the foundation for domain wall engineering in vdW ferroelectrics.

 

We developed a physical model to fundamentally understand the conductive filament (CF) formation and growth behavior in the switching layer during electroforming process in the metal-oxide-based resistive random-access memories (RRAM). The effects of the electrode and oxide layer properties on the CF morphology evolution, current-voltage characteristic, local temperature, and electrical potential distribution have been systematically explored. It is found that choosing active electrodes with lower oxygen vacancy formation energy and oxides with small Lorenz number (ratio of thermal and electrical conductivity) enables CF formation at a smaller electroforming voltage and creates a CF with more homogeneous morphology. This work advances our understanding of the kinetic behaviors of the CF formation and growth during the electroforming process and could potentially guide the oxide and electrode materials selection to realize a more stable and functional RRAM.

 

Perovskite materials, of which strontium titanate (STO) and its thin films are an example, have attracted significant scientific interest because of their desirable properties and the potential to tune thermal conductivity by employing several techniques. Notably, strontium titanate thin films on silicon (Si) substrates serve as a fundamental platform for integrating various oxides onto Si substrates, making it crucial to understand the thermal properties of STO on Si. This work investigates the thermal conductivity of STO thin films on an Si substrate for varying film thicknesses (12, 50, 80, and 200 nm) at room temperature (∼300 K). The thin films are deposited using molecular beam epitaxy on the Si substrate and their thermal conductivity is characterized using the frequency domain thermoreflectance (FDTR) method. The measured values range from 7.4 ± 0.74 for the 200 nm thick film to 0.8 ± 0.1 W m−1 K−1 for the 12 nm thick film, showing a large effect of the film thickness on the thermal conductivity values. The trend of the values is diminishing with the corresponding decrease in the thin film thickness, with a reduction of 38%–93% in the thermal conductivity values, for film thicknesses ranging from 200 to 12 nm. This reduction in the values is relative to the bulk single crystal values of STO, which may range from 11 to 13.5 W m−1 K−1 [Yu et al., Appl. Phys. Lett. 92, 191911 (2008) and Fumega et al., Phys. Rev. Mater. 4, 033606 (2020)], as measured by our FDTR-based experiment. The study also explores the evaluation of volumetric heat capacity (Cp). The measured volumetric heat capacity for the 200 nm thin film is 3.07 MJ m−3 K−1, which is in reasonable agreement with the values available in the literature.

 

The freestanding ferroelectric membranes with super-elasticity show promising applications in flexible electronic devices such as transducers, memories, etc. While there have been recent studies on the effect of mechanical bending on the domain structure evolutions and phase transitions in ferroelectric membranes, its influence on Young's modulus of these freestanding membranes is less explored, which is crucial for the design and application of flexible electronics. Here, a phase-field model is developed to simulate the tunability of Young's modulus of freestanding Ba1−xSrxTiO3 membranes under mechanical bending. It is demonstrated that the bended membrane shows a uniform Young's modulus compared with unbended membrane. By increasing the bending angle, Young's modulus tunability is enhanced, which can be attributed to the vortex-like domain structures induced by the mechanical bending. These vortex-like domains with large domain wall energy inhibit the subsequent domain switching under externally applied tensile strain and reduce the eigenstrain variation, which leads to a large Young's modulus. In addition, the formation of vortex domain structure is suppressed with increasing Sr2+ content in Ba1−xSrxTiO3 membranes at the same bending degree, resulting in a decrease in Young's modulus tunability. Our work reveals that the tunability of Young's modulus of freestanding ferroelectric membranes can be achieved by mechanical bending, which provides guidance for designing flexible electronic devices. 

The epitaxial growth of SrTiO 3 on Si(100) substrates that have been lithographically patterned to realize deposition-last, lithographically defined oxide devices on Si is explored. In contrast to traditional deposition-last techniques which create a physical hard mask on top of the substrate prior to epitaxial growth, a pseudomask is instead created by texturing the Si substrate surface itself. The Si is textured through a combination of reactive ion etching and wet-etching using a tetramethylammonium hydroxide solution. Desorbing the native SiO x at high temperatures prior to epitaxial growth in ultrahigh vacuum presents no complications as the patterned substrate is comprised entirely of Si. The inverted profile in which the epitaxial oxide device layer is above the textured pseudomask circumvents shadowing during deposition associated with conventional hard masks, thereby opening a pathway for highly scaled devices to be created.