This paper describes a study evaluating 1.2 kV SiC
MOSFETs in modular multilevel cascaded H-bridge (CHB) threephase
inverter for medium voltage ac grid applications. The main
purpose of this topology is to remove the need of a bulk 60 Hz
transformer that is normally used to step up the output signal of a
voltage source inverter to the medium voltage level. Using SiC
devices (1.2 kV ~ 6.5 kV SiC MOSFETs), with their high
breakdown voltage, enables the system to meet and withstand the
medium voltage stress, with a minimized number of cascaded
modules. The SiC-based power electronics, when used in the
presented topology, they significantly reduce the complexity
usually faced when Si devices are used to meet the medium voltage
level and the power scalability. The simulation and preliminary
experimental results, on a low-voltage prototype, verifies the ninelevel
CHB topology that is presented in this paper.
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Evaluation of a Medium-Voltage Grid-Tied Cascaded H-Bridge for Energy Storage Systems Using SiC Switching Devices
This paper presents the study and evaluation of a medium-voltage grid-tied cascaded H-bridge (CHB) three-phase inverter for battery energy storage systems using SiC devices as an enabling technology. The high breakdown voltage capability of SiC devices provide the advantage to significantly minimize the complexity of the CHB multilevel converter, with less power loss compared to when Silicon (Si) devices are used. The topology in this study has been selected based on high voltage SiC devices. In order to reach 13.8 kV, a nine-level CHB is needed when using 6.5 kV SiC MOSFETs. However, if 10 kV SiC MOSFETs are used, only five-levels of the CHB are required. The controls were developed, simulated and verified through an experimental prototype. The results from the scaled-down prototype proved the controls and the verification of the performance of five-level CHB three-phase inverter. For the system reliability, both open-loop and short-circuit faults are analyzed.
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- Award ID(s):
- 1747757
- NSF-PAR ID:
- 10127786
- Date Published:
- Journal Name:
- Evaluation of a Medium-Voltage Grid-Tied Cascaded H-Bridge for Energy Storage Systems Using SiC Switching Devices
- Page Range / eLocation ID:
- 1 to 5
- Format(s):
- Medium: X
- Sponsoring Org:
- National Science Foundation
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This paper describes the study of a topology of modular multilevel converters for integrating battery energy storage into a medium (13.8 kV) distribution system. The main benefit of this topology is to remove the need for a bulk 60 Hz transformer that is normally used to step up the output of a voltage source inverter to the medium voltage level. A SiC-based power electronics interface presented in this paper provides an efficient solution without the large and costly transformer. Using medium voltage SiC devices (≥ 10 kV SiC MOSFETs), with their high breakdown voltage, enables the system to meet and withstand medium voltage application, using a minimized number of cascaded modules. This SiC-based power electronics interface significantly reduces the complexity usually faced when Si devices are used directly in medium voltage applications. The voltage and state of charge balancing control for battery modules is also simplified and performs well. The simulation and experimental results, performed on a low-voltage prototype, verify the proposed topology that is presented in this paper.more » « less
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Abstract—Wide band gap (WBG) devices, like silicon carbide (SiC) MOSFET has gradually replaced the traditional silicon counterpart due to their advantages of high operating temperature and fast switching speed. Paralleling operations of SiC MOSFETs are unavoidable in high power applications in order to meet the system current requirement. However, parasitics mismatches among different paralleling devices would cause current unbalance issues, which would reduce the system reliability and maximum current capability. Thus, to achieve current balancing operation, this paper proposes a solution of using multi-level active gate driver, where the dynamic current sharing during turn-on and turn-off processes are achieved by adjusting the delays, intermediate turn-on and turn-off voltages. The static current sharing is maintained by regulating the static turn-on gate voltage, where the on-state resistance mismatch between different devices can be compensated. A double pulse test setup with two different SiC MOSFETs is built to emulate the scenario of worst case application with large differences of threshold voltage and on-state resistance. The experimental results demonstrate that the proposed active gate driver can achieve both dynamic and static current sharing operations for SiC MOSFETs with paralleling operation. Moreover, the system control diagram is discussed. Simulation studies are conducted to achieve closed-loop control of the paralleled SiC MOSFETs with the aid of the active gate driver approach.more » « less
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- Free Publicly Accessible Full Text
-
Accepted Manuscript1.0
- Conference Paper:
- https://doi.org/10.1109/eGRID.2018.8598683
