skip to main content


Title: Analysis of Schottky barrier heights and reduced Fermi-level pinning in monolayer CVD-grown MoS 2 field-effect-transistors
Abstract Chemical vapor deposition (CVD)-grown monolayer (ML) molybdenum disulfide (MoS 2 ) is a promising material for next-generation integrated electronic systems due to its capability of high-throughput synthesis and compatibility with wafer-scale fabrication. Several studies have described the importance of Schottky barriers in analyzing the transport properties and electrical characteristics of MoS 2 field-effect-transistors (FETs) with metal contacts. However, the analysis is typically limited to single devices constructed from exfoliated flakes and should be verified for large-area fabrication methods. In this paper, CVD-grown ML MoS 2 was utilized to fabricate large-area (1 cm × 1 cm) FET arrays. Two different types of metal contacts (i.e. Cr/Au and Ti/Au) were used to analyze the temperature-dependent electrical characteristics of ML MoS 2 FETs and their corresponding Schottky barrier characteristics. Statistical analysis provides new insight about the properties of metal contacts on CVD-grown MoS 2 compared to exfoliated samples. Reduced Schottky barrier heights (SBH) are obtained compared to exfoliated flakes, attributed to a defect-induced enhancement in metallization of CVD-grown samples. Moreover, the dependence of SBH on metal work function indicates a reduction in Fermi level pinning compared to exfoliated flakes, moving towards the Schottky–Mott limit. Optical characterization reveals higher defect concentrations in CVD-grown samples supporting a defect-induced metallization enhancement effect consistent with the electrical SBH experiments.  more » « less
Award ID(s):
2001107 2052527
NSF-PAR ID:
10319284
Author(s) / Creator(s):
; ; ; ; ;
Date Published:
Journal Name:
Nanotechnology
Volume:
33
Issue:
22
ISSN:
0957-4484
Format(s):
Medium: X
Sponsoring Org:
National Science Foundation
More Like this
  1. Abstract

    Sc has been employed as an electron contact to a number of two-dimensional (2D) materials (e.g. MoS2, black phosphorous) and has enabled, at times, the lowest electron contact resistance. However, the extremely reactive nature of Sc leads to stringent processing requirements and metastable device performance with no true understanding of how to achieve consistent, high-performance Sc contacts. In this work, WSe2transistors with impressive subthreshold slope (109 mV dec−1) andION/IOFF(106) are demonstrated without post-metallization processing by depositing Sc contacts in ultra-high vacuum (UHV) at room temperature (RT). The lowest electron Schottky barrier height (SBH) is achieved by mildly oxidizing the WSe2in situbefore metallization, which minimizes subsequent reactions between Sc and WSe2. Post metallization anneals in reducing environments (UHV, forming gas) degrade theION/IOFFby ~103and increase the subthreshold slope by a factor of 10. X-ray photoelectron spectroscopy indicates the anneals increase the electron SBH by 0.4–0.5 eV and correspondingly convert 100% of the deposited Sc contacts to intermetallic or scandium oxide. Raman spectroscopy and scanning transmission electron microscopy highlight the highly exothermic reactions between Sc and WSe2, which consume at least one layer RT and at least three layers after the 400 °C anneals. The observed layer consumption necessitates multiple sacrificial WSe2layers during fabrication. Scanning tunneling microscopy/spectroscopy elucidate the enhanced local density of states below the WSe2Fermi level around individual Sc atoms in the WSe2lattice, which directly connects the scandium selenide intermetallic with the unexpectedly large electron SBH. The interface chemistry and structural properties are correlated with Sc–WSe2transistor and diode performance. The recommended combination of processing conditions and steps is provided to facilitate consistent Sc contacts to WSe2.

     
    more » « less
  2. Abstract

    Au‐mediated exfoliation of 2D transition‐metal dichalcogenides (TMDs) has received significant attention due to its ability to produce large‐area monolayer (ML) flakes. This process has been attributed to strong TMD/Au binding energy (BE) as well as the uniform strain between the TMDs and Au. However, large‐area exfoliation of TMDs with other metals that have even stronger theoretical BE than Au/TMD is not successful, leading to question whether the BE plays any role in the exfoliation process. Here, successful demonstration of large‐area ML MoS2using Cu, Ni, and Ag with various predicted strain, including Pd with almost no strain, but stronger BE than Au/MoS2is demonstrated. Optical micrographs show MoS2flakes with 100s of µm in size with a yield of several tens to hundreds of ML flakes per exfoliation. Photoluminescence and Raman spectroscopy confirm the ML nature of the flakes, while electrical transport measurements show mobilities of6 cm2 V−1 s−1with a current on‐off ratio108consistent with high‐quality ML MoS2. Given that MoS2can be exfoliated with metals that have strong BE irrespective of their strain values suggests that BE is the primary mechanism in successful exfoliation of large‐area ML MoS2.

     
    more » « less
  3. Abstract

    This paper provides comprehensive experimental analysis relating to improvements in the two-dimensional (2D) p-type metal–oxide–semiconductor (PMOS) field effect transistors (FETs) by pure van der Waals (vdW) contacts on few-layer tungsten diselenide (WSe2) with high-k metal gate (HKMG) stacks. Our analysis shows that standard metallization techniques (e.g., e-beam evaporation at moderate pressure ~ 10–5 torr) results in significant Fermi-level pinning, but Schottky barrier heights (SBH) remain small (< 100 meV) when using high work function metals (e.g., Pt or Pd). Temperature-dependent analysis uncovers a more dominant contribution to contact resistance from the channel access region and confirms significant improvement through less damaging metallization techniques (i.e., reduced scattering) combined with strongly scaled HKMG stacks (enhanced carrier density). A clean contact/channel interface is achieved through high-vacuum evaporation and temperature-controlled stepped deposition providing large improvements in contact resistance. Our study reports low contact resistance of 5.7 kΩ-µm, with on-state currents of ~ 97 µA/µm and subthreshold swing of ~ 140 mV/dec in FETs with channel lengths of 400 nm. Furthermore, theoretical analysis using a Landauer transport ballistic model for WSe2SB-FETs elucidates the prospects of nanoscale 2D PMOS FETs indicating high-performance (excellent on-state current vs subthreshold swing benchmarks) towards the ultimate CMOS scaling limit.

     
    more » « less
  4. Abstract

    Monolayer ternary tellurides based on alloying different transition metal dichalcogenides (TMDs) can result in new two‐dimensional (2D) materials ranging from semiconductors to metals and superconductors with tunable optical and electrical properties. Semiconducting WTe2xS2(1‐x)monolayer possesses two inequivalent valleys in the Brillouin zone, each valley coupling selectively with circularly polarized light (CPL). The degree of valley polarization (DVP) under the excitation of CPL represents the purity of valley polarized photoluminescence (PL), a critical parameter for opto‐valleytronic applications. Here, new strategies to efficiently tailor the valley‐polarized PL from semiconducting monolayer WTe2xS2(1‐x)at room temperature (RT) through alloying and back‐gating are presented. The DVP at RT is found to increase drastically from < 5% in WS2to 40% in WTe0.12S1.88by Te‐alloying to enhance the spin‐orbit coupling. Further enhancement and control of the DVP from 40% up to 75% is demonstrated by electrostatically doping the monolayer WTe0.12S1.88via metallic 1T′‐WTe2electrodes, where the use of 1T′‐WTe2substantially lowers the Schottky barrier height (SBH) and weakens the Fermi‐level pinning of the electrical contacts. The demonstration of drastically enhanced DVP and electrical tunability in the valley‐polarized emission from 1T′‐WTe2/WTe0.12S1.88heterostructures paves new pathways towards harnessing valley excitons in ultrathin valleytronic devices for RT applications.

     
    more » « less
  5. Abstract

    The performance of electronic/optoelectronic devices is governed by carrier injection through metal–semiconductor contact; therefore, it is crucial to employ low‐resistance source/drain contacts. However, unintentional introduction of extrinsic defects, such as substoichiometric oxidation states at the metal–semiconductor interface, can degrade carrier injection. In this report, controlling the unintentional extrinsic defect states in layered MoS2is demonstrated using a two‐step chemical treatment, (NH4)2S(aq) treatment and vacuum annealing, to enhance the contact behavior of metal/MoS2interfaces. The two‐step treatment induces changes in the contact of single layer MoS2field effect transistors from nonlinear Schottky to Ohmic behavior, along with a reduction of contact resistance from 35.2 to 5.2 kΩ. Moreover, the enhancement ofIONand electron field effect mobility of single layer MoS2field effect transistors is nearly double forn‐branch operation. This enhanced contact behavior resulting from the two‐step treatment is likely due to the removal of oxidation defects, which can be unintentionally introduced during synthesis or fabrication processes. The removal of oxygen defects is confirmed by scanning tunneling microscopy and X‐ray photoelectron spectroscopy. This two‐step (NH4)2S(aq) chemical functionalization process provides a facile pathway to controlling the defect states in transition metal dichalcogenides (TMDs), to enhance the metal‐contact behavior of TMDs.

     
    more » « less